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Publications

2007

  1. O.M. Nayfeh, D.A. Antoniadis, K. Mantey, and M.H. Nayfeh, "Memory effects in metal-oxide-semiconductor capacitors incorporating dispensed highly monodisperse 1 nm Si nanoparticles," Applied Physics Letters, 90, 153105, 2007.
  2. O.M. Nayfeh, D.A. Antoniadis, K. Mantey, and M.H. Nayfeh, "Memory effects in metal-oxide-semiconductor capacitors incorporating dispensed highly monodisperse 1 nm Si nanoparticles," Device Research Conference (DRC), Notre Dame, June, 2007
  3. K. H. Kim, R. Gordon, A. Ritenour, and D.A. Antoniadis, "Atomic layer deposition of insulating nitride interfacial layers for germanium metal-oxide-semiconductor field effect transistors with high-permittivity oxide/ tungsten nitride gate stacks," accepted Appl. Phys. Lett., Mar. 2007.

2006

  1. A. Khakifirooz and D. A. Antoniadis, "Transistor performance scaling: the role of virtual source velocity and its mobility dependence," /IEDM Tech. Dig.,/ pp. 667-670, 2006.

  2. D. A. Antoniadis, A. Khakifirooz, I. Åberg, and J. L. Hoyt, "Channel material innovations for continuing the historical MOSFET performance increase with scaling," / ECS Trans.,/ Vol. 3, 3, pp. 3-15, 2006. D. A. Antoniadis, I. Åberg, C. N. Chleirigh, O. M. Nayfeh, A. Khakifirooz, and J. L. Hoyt, "Continuous MOSFET performance increase with device scaling: the role of strain and channel material innovation," /IBM J. Research Dev.,/ Vol. 50, 4/5, pp. 363-376, 2006.

  3. A. Ritenour, A. Khakifirooz, D.A. Antoniadis , R.Z. Lei, W. Tsai, A. Dimoulas, G. Mavrou and Y. Panayiotatos , “ Subnanometer-equivalent-oxide-thickness germanium p-MOS field-effect-transistors fabricated using molecular-beam-deposited high-k/metal gate stack ,” Appl. Phys. Lett., Vol. 88, p. 132107, 2006.

  4. A. Khakifirooz and D. A. Antoniadis, “Scalability of hole mobility enhancement in biaxially strained ultrathin body SOI,” IEEE Electron Device Lett., Vol. 27, pp. 402-404, 2006.

  5. W. P. Bai, N. Lu, A. Ritenour, M. L. Lee, D. Antoniadis, and D. L. Kwong, “Ge n-MOSFETs on Lightly Doped Substrates with High- k Dielectric and TaN Gate,” IEEE Electron Device Lett., Vol. 27, pp. 175-178, 2006

2005

  1. L. J. Jin, K. L. Pey, W. K. Choi, E. A. Fitzgerald, D. A. Antoniadis, A. J. Pitera, M. L. Lee, D. Z. Chi, M. A. Rahman, T. Osipowicz, and C. H. Tung, “Effect of Pt on agglomeration and Ge out diffusion in Ni(Pt) germanosilicide,” J. Applied Physics, Vol. 98, p 33520, 2005.
  2. L. J. Jin, K. L. Pey, W. K. Choi, E. A. Fitzgerald, D. A. Antoniadis, A. J. Pitera, M. L. Lee, and C. H. Tung, “Highly oriented Ni(Pd)SiGe formation at 400°C,” Journal of Applied Physics, Vol. 97, p 104917, 2005.
  3. M. A. Rahman, T. Osipowicz, K. L. Pey, L. J. Lin, W. K. Choi, D. Z. Chi, D. A. Antoniadis, E. A. Fitzgerald, and D. M. Isaacson, “Suppression of oxidation in nickel germanosilicides by Pt incorporation”, Applied Physics Letters, Vol. 87 182116 (on line) 2005.
  4. R.Z. Lei, W. Tsai, I. Aberg, T.B. O'Reilly, J.L. Hoyt, D.A. Antoniadis, H.I.Smith, A.J. Paul, M.L. Green, J. Li, and R. Hull, "Strain relaxation in patterned strained silicon directly on insulator structures," Appl. Phys. Lett., vol. 87, pp.251926:1-3, 2005
  5. A. Khakifirooz and D. A. Antoniadis, “Scalability of hole mobility enhancement in biaxially strained ultrathin body SOI,” submitted to IEEE Electron Device Lett.
  6. I. Åberg, T.A. Langdo, Z.-Y. Cheng, A. Lochtefeld, I. Lauer, D.A. Antoniadis, and J.L. Hoyt, “Transport and Leakage in Super-Critical Thickness Strained Silicon on Insulator MOSFETs with Strained Si Thickness up to 135 nm ,” IEEE SOI Conference, Oct. 2005.
  7. I. Lauer and D. A. Antoniadis “Enhancement of electron mobility in ultrathin-body silicon-on-insulator MOSFETs with uniaxial strain”, IEEE Electron Device Letters, Vol. 26, No. 5, pp. 314-316, 2005.
  8. B. H. Koh, E.W.H. Kan, W. K. Chim, W. K. Choi, D. A. Antoniadis, and E. A. Fitzgerald, "Traps in Germanium Nanocrystal Memory and Effect on Charge Retention - Modeling and Experimental Measurements", J. App. Physics, 97, 2005.

2004

  1. Jin L. J., Pey K. L., Choi W. K., Fitzgerald E. A., Antoniadis D. A., Pitera A. J., Lee M. L., and Chi D. Z., “Study of Nickel (Platinum) (Pt at.% = 0, 5, 10) Germanosilicide Formation Using Micro-Raman Spectroscopy”, MRS Spring meeting, 2004.

  2. Jin L. J., Pey K. L., Choi W. K., Fitzgerald E. A., Antoniadis D. A., Pitera A. J., Lee M. L., and Chi D. Z., “Study of Nickel (Platinum) (Pt at.% = 0, 5, 10) Germanosilicide Formation Using Micro-Raman Spectroscopy”, MRS Spring meeting, 2004.

  3. I. Åberg, O.O. Olubuyide, C. Ní Chléirigh, I. Lauer, D.A. Antoniadis, J. Li, R. Hull, and J.L. Hoyt, “Electron and Hole Mobility Enhancements in Sub-10 nm-thick Strained Silicon Directly on Insulator Fabricated by a Bond and Etch-back Technique,” IEEE Symp. on VLSI Technology, Hawaii, pp. 52-53, (2004).

  4. H.M. Nayfeh, J.L. Hoyt, and D.A. Antoniadis, “A physically based analytical model for the threshold voltage of strained- Si n-MOSFETs,” IEEE Trans. Elec. Dev. 51(12), Dec. 2004, pp. 2069-2072

  5. E.W.H. Kan, W.K. Choi, W.K. Chim, E.A. Fitzgerald, and D.A. Antoniadis,“Origin of charge trapping in germanium nanocrystals embedded SiO2 system: Role of interfacial traps?”, J. Appl. Phys., vol. 95, no. 6, pp. 3148-3152, 2004.

  6. G. Xia, H. M. Nayfeh, M. L. Lee, E. A. Fitzgerald, D. A. Antoniadis, D. H. Anjun, J. Li, R. Hull, N Klymko, and J. L. Hoyt, “Impact of Ion Implantation Damage and Thermal Budget on Mobility Enhancement in Strained-Si N- Channel MOSFETs,” IEEE Trans. Electron Dev.,Vol. 51, pp. 2136-2144, (2004).

  7. T.A. Langdo, Z. Cheng, J. Fiorenza, M.T. Currie, M. Erdtmann, G. Braithwaite, C.J. Vineis, C.W. Leitz, J.A. Carlin, A. Lochtefeld, H. Badawi, M.T. Bulsara, I. Lauer, D.A. Antoniadis, M. Somerville, “SSOI Technology: From Materials to Devices”, Solid State Electronics, Vol. 48, No. 8, p. 1357, 2004.

  8. J.-W. Jung, Shaofeng Yu, Minjoo L. Leec, Judy L. Hoyt, Eugene. A. Fitzgerald, and D. A. Antoniadis,”Modeling of Mobility Behavior in Dual-Channel Heterojunction Si/SiGe pMOSFETs”, IEEE Trans. Elec. Dev. 51(9), pp. 1424-1431, 2004.

  9. Z. Cheng, J. Jung, M.L. Lee, A.J. Pitera, J.L. Hoyt, D.A. Antoniadis and E.A. Fitzgerald, "Hole mobility enhancement in strained-Si/strained-SiGe heterostructure p-MOSFETs fabricated on SiGe-on-insulator (SGOI)," Semiconductor Science and Technology, Vol. 19, No. 5, L48-L51, 2004.

  10. Z. Cheng, A.J. Pitera, M.L. Lee, J. Jung, J.L. Hoyt, D.A. Antoniadis and E.A. Fitzgerald, "Fully Depleted Strained-SOI n- and p-MOSFET's on Bonded SiGe-On-Insulator Substrates and Study of the SiGe/Buried-oxide interface," IEEE Electron Device Letters, Vol. 25, No. 3, pp. 147-149, 2004.

  11. J.-W. Jung, S. Yu , O. O. Olubuyide, J. L. Hoyt, and D. A. Antoniadis, M. L. Lee, and E. A. Fitzgerald, “Effect of thermal processing on mobility in strained Si /Strained Si1-y Gey on relaxed Si1-xGe x (x<y) virtual substrates”, Applied Physics Letters, Vol. , pp. 3319-3321, 2004.

  12. S. Yu, J.-W. Jung, J. L. Hoyt, and D. A.Antoniadis ,”Strained Si/SiGe Double Heterojunction Substrate As CMOS Substrate for Single Workfunction Metal Gate Technology” IEEE Electron Dev. Lett., Vol. , pp. , 2004.

  13. S. Narendra, V. De, S. Borkar, D. A. Antoniadis, and A. P. Chandrakasan, “Full-chip subthreshold leakage power prediction and reduction techniques for sub-0.18-um CMOS,” IEEE J. of Solid-State Circuits, Vol. 39, 3, pp. 501-510, 2004.

  14. I. Lauer, T. A. Langdo, Z.-Y.Cheng, J. G. Fiorenza, G. Braithwaite, M. T. Currie, C. W. Leitz, A. Lochtefld, H. Badawi, M. T. Bulsara, M. Somerville, and D. A. Antoniadis, “Fully depleted n-MOSFETs on supercritcal thickness strained SOI,” IEEE Electron Dev. Lett., Vol. 25, 2, pp. 83-85, 2004.

  15. A. Khakifirooz and D. A. Antoniadis, “On the electron mobility in ultrathin SOI and GOI,” IEEE Electron Dev. Lett., Vol. 25, 2, pp. 80-82, 2004.

  16. M. Meinhold, J.-W. Jung, and D. A. Antoniadis, “Sensitive train measurements of bonded SOI films using Moire,” IEEE Trans. on Semic. Manuf., Vol. 17, 1, pp.35-41, 2004.

  17. K. L. Pey, W. K. Choi, S. Chattopadhyay, Y. Miron, E. A. Fitzgerald, D. A. Antoniadis and T. Ospowicz, “On the stability and composition of Ni-germanosilicided Si1-xGex films,” to appear J. of Vac. Sci. and Tech., March 2004.

2003

  1. H.M. Nayfeh, J.L. Hoyt, and D.A. Antoniadis, “Investigation of the Performance Enhancement of Nanoscale Strained Si n-MOSFETs,” IEEE IEDM Tech. Digest, Dec. pp.475-478 (2003)

  2. T.S. Drake, M.L. Lee, A.J. Pitera, E.A. Fitzgerald, D.A. Antoniadis, J.L. Hoyt, D.H. Anjum, J. Li, R. Hull, and N. Klymko, “Fabrication of Strained Silicon on Insulator for Ultra-thin Body and Double-gate MOSFETs,” Third International Conference in SiGe(C) Epitaxy and Heterostructures, Santa Fe, New Mexico, presented March 11, 2003.

  3. H. M. Nayfeh, C. W. Leitz, A. J. Pitera, E.A. Fitzgerald, J., L.Hoyt, and D. A. Antoniadis, "Influence of High Channel Doping on the Inversion Layer Electron Mobility in Strained Silicon n-MOSFETs," IEEE Electron Device Letters, April 2003, Vol. 24 (4), p. 248.

  4. T.S. Drake, C.N. Chleirigh, M.L. Lee, A. J. Pitera, E.A. Fitzgerald, D.A. Antoniadis, D.H. Anjum, J. Li, R. Hull, N. Klymko, and J.L. Hoyt, "Fabrication of Ultra-thin Strained Silicon on Insulator," Journal of Electronic Materials, Sept. 2003, Vol. 32 (9), pp. # 972-975.

  5. Kan E. W. H., Leoy C. C., Choi W. K., Chim W. K., Antoniadis D. A., and Fitzgerald E. A. “Effect of annealing profile on defect annihilation, crystallinity and size distribution of germanium nanodots,” Applied Physics Letters, Vol. 83, pp. 2058-2060, 2003.

  6. J. Jung, M. L. Lee, S.Yu, E.A. Fitzerald, and D.A. Antoniadis, “Implementation of both high hole and electron mobility in strained Si/strained Si1-yGey on relaxed Si1-xGex (x,y) virtual substrate,” IEEE Electron Device Lett. Vol. 24, pp.460, July, (2003).

  7. V. Ho, L.W. Teo, W.K. Choi, W. K. Chim, M.S. Tay, D.A. Antoniadis, E.A. Fitzgerald, A.Y. Du, C.H. Tung, R. Liu and A.T.S. Wee, “Effect of germanium concentration and tunnel oxide thickness on nanocrystal formation and charge storage/retention characteristics of a tri-layer memory structure” Applied Physics Letters, Vol. 83, pp. 3558-3560, 2003.

  8. T.S. Drake, C. Ní Chléirigh, M.L. Lee, A.J. Pitera, E.A. Fitzgerald, D.A. Antoniadis, D.H. Anjum, J. Li, R. Hull, N. Klymko, and J.L. Hoyt, “Effect of Rapid Thermal Annealing on Strain in Ultra-thin Strained Silicon on Insulator Layers”, Appl. Phys. Lett., Vol 80 (5), p. 875 (2003).

2002

  1. J.L. Hoyt, H.M. Nayfeh, S. Eguchi, I. Aberg, G. Xia, T. Drake, E.A. Fitzgerald, D.A. Antoniadis, “Strained Silicon MOSFET Technology”, invited conference presentation and proceedings article in IEEE International Electron Devices Meeting (IEDM) Technical Digest, p. 23 – 26 2002 (Invited Paper).

  2. Teo L. W., Heng C. L., Ho V., Tay M., Choi W. K., Chim W. K., Antoniadis D. A., and Fitzgerald E. A., "Manipulation of Germanium nanocrystals in a tri-layer insulator structure of a metal-insulator-semiconductor memory device", in Proceedings of MRS Spring 2002 Meeting.

  3. D. A. Antoniadis, “MOSFET Scalability Limits and ‘New Frontier’ Devices”, 2002 Symposium on VLSI Technology Digest of Technical Papers, p. 2, June 2002 (Invited Plenary Paper).

  4. Teo L. W., Heng C. L., Ho V., Tay M., Choi W. K., Chim W. K., Antoniadis D. A. & Fitzgerald E. A., "Manipulation of Germanium nanocrystals in a tri-layer insulator structure of a metal-insulator-semiconductor memory device", in Proceedings of MRS Spring 2002 Meeting.

  5. J. Tschanz, J. Kao, S. Narendra, R. Nair, D. Antoniadis, A. Chandrakasan, V. De, "Adaptive Body-Bias for Reducing Impacts of Die-to-Die and Within-Die Parameter Variations on Microprocessor Frequency and Leakage," at ISSCC 2002.

  6. L. W. Leo, W. K. Choi, W. K. Chim, V. Ho, C. M. Moey, T. S. Tay, Y, Lei, D. A. Antoniadis, and E. A. Fitzgerald, “Size control and charge storage mechanism of germanium nanocrystals in a metal-insulator-semiconductor structure,” Appl. Phys. Lett., Vol. 81, No 19, pp. 3639-3641, (2002).

  7. I. J. Djomehri, and D. A. Antoniadis, “Inverse modeling of sub-100 nm MOSFETs using I-V and C-V”, IEEE Trans. Electron Dev., pp. 568-575, (2002).

  8. J. W. Tschanz, J. T. Kao, S. G. Narendra, R. Amir, D. A. Antoniadis, A. P. Chandrakasan, and V. De, “Adaptive body bias for reducing imapcts of die-to-die and within-die parameter variations on microprocessor frequency and leakage”, IEEE J. of Solid-State Circuits, Vol. 37, No 11, pp. 1396-1402, (2002).

  9. C. W. Leitz, M. T. Currie, M. L. Lee, Z.-Y. Cheng, D. A. Antoniadis and E. A. Fitzgerald, “Hole mobility enhancement and alloy scattering-limited mobility in tensile strained Si/SiGe surface channel metal-oxide-semiconductor field-effect transistors,” J. Appl. Phys., Vol. 92, No 7, pp. 3745-3751, (2002).

  10. Pey K. L., Choi W. K. Chattopadhyay, S. Zhao H. B., Fitzgerald E. A., Antoniadis D. A., and Lee P. S., “Thermal reaction of nickel and Si0.75Ge0.25 alloy”, Journal of Vacuum Science and Tech., A20(6) pp. 1903-1910, (2002).

  11. Zhao H. B., Pey K. L., Choi W. K., Chattopadhyay S., Fitzgerald E. A. & Antoniadis D. A., “Interfacial reactions of Ni on Si1-xGex (x=0.2, 0.3) at low temperature by rapid thermal annealing”, Journal of Applied Physics, Vol. 92, No. 1, pp. 214 (2002).

  12. G. Taraschi, T. A. Langdo, M. T. Currie, E. A. Fitzgerald, and D. A. Antoniadis, “Relaxed SiGe-on-insulator fabricated via wafer bonding and etch back,” Journal of Vacuum Science &Technology B 20, 725 (2002).

  13. A. Lochtefeld, I. J. Djomehri, G. S. Samudra, and D. A. Antoniadis, “New Insights into Carrier Transport in n-MOSFETs,” IBM J. Res. & Dev., Vol. 46, pp 347-357, May 2002.

  14. H. Wakabayashi, G. S. Samudra, I. J. Djomehri, H. Nayfeh, and D. A. Antoniadis, “Supply-Voltage Optimization for Below-70-nm Technology-Node MOSFETs,” IEEE Trans. On Semic. Manuf., Vol. 15, pp 151-156, May 2002.

  15. W.K. Choi, W. K. Chim, C.L. Heng, L.W. Teo, Vincent Ho, V. Ng, D.A. Antoniadis and E.A. Fitzgerald, “Observation of memory effect in germanium nanocrystals embedded in an amorphous silicon oxide matrix of a metal-insulator-semiconductor structure” Applied Phys. Lett., Vol. 80, No. 11, p. 2014. March, 2002.

2001

  1. G. Taraschi, T. A. Langdo, M. T. Currie, C. W. Leitz, M. L. Lee, Z. Cheng, Dimitri. A. Antoniadis, and Eugene A. Fitzgerald, “Relaxed SiGe on insulator fabricated via wafer bonding and layer transfer: etch-back and smart-cut alternatives,” in Silicon on Insulator Technology and Device X, The Electrochemical Society Meeting Proceedings, 2001.

  2. Z. Cheng, M. T. Currie, C. W. Leitz, G. Taraschi, E. A. Fitzgerald, J. L. Hoyt and D. A. Antoniadis, “SiGe-on-Insulator (SGOI): substrate preparation and MOSFET fabrication for electron mobility evaluation,” 2001 IEEE International SOI Conference Proceedings, Oct. 2001.

  3. Z. Cheng, Matthew T. Currie, Chris W. Leitz, Gianni Taraschi, Minjoo L. Lee, Arthur Pitera, Judy L. Hoyt, Dimitri. A. Antoniadis, and Eugene A. Fitzgerald, "Relaxed Silicon-Germanium on Insulator (SGOI)," 2001 FALL MEETING PROCEEDINGS, "Symposium A, Materials Issues in Novel Si-Based Technology," MRS Proceedings Volume 686, pp. A 1.5.1-A1.5.6, 2001

  4. D. A. Antoniadis, I. J. Djomehri, and A. Lochtefeld, “ Electron Velocity in Sub-50-nm Channel MOSFETs”, Proceedings of SISPAD 2001, D. Tsoukalas and C. Tsamis, editors, Springer-Verlag, pp. 156-161, 2001.

  5. S. Narendra, A. Chandrakasan, D. Antoniadis, S. Borkar, and V. De,"Scaling of Stack Effect and its Application for Leakage Reduction," IEEE/ACM International Symposium on Low Power Electronics and Design, Huntington Beach, California, August 2001.

  6. D. A. Antoniadis, “MOSFET Design Considerations for the Sub-70-nm Technology Nodes,” MRS Symposium on Si Front-End Processing, San Francisco, CA, April 17-19, 2001, (invited)

  7. A. Lochtefeld and D. A. Antnoniadis, “Investigating the Releationship Between Electron Mobility and Velocity in Deeply Scaled NMOS via Mechanical Stress”, IEEE Electron Device Lett., EDL-22, 591, Dec. 2001.

  8. Tan C. S., W.K. Choi, L.K. Bera, K.L. Pey, D.A. Antoniadis, E.A. Fritgerald, M.T. Currie and C.K. Maiti, “N2O oxidation of strained Si/relaxed SiGe heterostructure grown by UHVCVD”, Solid State Electronics, Vol. 45, pp. 1945, 2001.

  9. Zhi-Yuan Cheng, Matthew T. Currie, Chris W. Leitz, Gianni Taraschi, Eugene A. Fitzgerald, Judy L. Hoyt and Dimitri. A. Antoniadis, "Electron Mobility Enhancement in Strained-Si n-MOSFET's Fabricated on SiGe-on-Insulator (SGOI) Substrates", IEEE Electron Device Lett., EDL-22, 321, July 2001.

  10. Zhi-Yuan Cheng, Gianni Taraschi, Mathew T. Currie, Chris W. Leitz, Thomas A. Langdo, Minjoo L. Lee, Arthur Pitera, Eugene A. Fitzgerald, "Relaxed Silicon-Germanium on Insulator Substrate by Layer Transfer", Journal of Electronic Materials, Vol. 30, No. 12, pp. L37-L39, 2001.

  11. Fiorenza, J., J. del Alamo, and D. A. Antoniadis, “A RF Power LDMOSFET on SOI,” IEEE Electron Device Lett., EDL-22, 139, March., 2001.

  12. A. Lochtefeld and D. Antoniadis, "On experimental determination of carrier velocity in deeply scaled NMOS: How close to the thermal limit?" IEEE Electron Device Lett., EDL-22, 95, Feb. 2001.

2000

  1. G. Taraschi, T.A. Langdo, M.T. Currie, E. A. Fitzgerald, "Relaxed SiGe on Insulator Fabricated by Wafer Bonding and Etch-back", presented at Electronic Materials Conference, June 2000.

  2. M. T. Currie, C. W. Leitz, T. A. Langdo, E. A. Fitzgerald, M. A. Armstrong, D. A. Antoniadis, "Carrier Mobilities and Process Stability of n- and p-Surface Channel Strained Si/SiGe MOSFETs," presented at Electronic Materials Conference, June 2000.

  3. T.A. Langdo, C.W. Leitz, M.T. Currie, and E.A. Fitzgerald, A. Lochtefeld and D. A. Antoniadis, "High Quality Ge on Si by Epitaxial Necking, Applied Physics Letters, 76, (25), June 19, 2000

1999

  1. Lee, J-H, G. Taraschi, A. Wei, T. A. Langdo, E. A. Fitzgerald, and D. A. Antoniadis, “Super-Self-Aligned Double-Gate (SSDG) MOSFETs Utilizing Oxidation Rate Difference and Selective Epitaxy,” IEDM Technical Digest, 71-74, 1999.

  2. D. A. Antoniadis, A. Wei, and A. Lochtefeld, “SOI Devices and Technology”, Proceedings of the 29 th European Solid-State Device Research Conference (ESSDERC 99), Leuven, Belgium, 81-87, 1999.

  3. Mistry, K. R., J. W. Sleight, G. Grula, R. Flatley, B. Miner, L. A. Bair, and D. A. Antoniadis, “Parasitic Bipolar Gain Reduction and the Optimization of 0.25-m Partially Depleted SOI MOSFET’s,” IEEE Trans. on Elect. Dev., 2201-2209, November 1999.

  4. Lee, Z. K., M. B. McIlrath, and D. A. Antoniadis, “ Two-Dimensional Doping Profile Characterization of MOSFETs by Inverse Modeling Using I-V Characteristics in the Subthreshold Region,” IEEE Trans. on Elect. Dev., 1640-1649, August 1999.

1998

  1. Sleight, J. W., K. R. Mistry, and D. A. Antoniadis, “Transient Measurements of SOI Body Contact Effectiveness,” IEEE Electron Dev. Lett., EDL-19, 499-501, December 1998.

  2. Shen, C.-C., J. Murguia, N. Goldsman, M. Peckerar, J. Melngailis, and D. Antoniadis, "Use of Focused-Ion-Beam and Modeling to Optimize Submicron MOSFET Characteristics," IEEE Trans. on Elect. Dev., 45, 453-459, February 1998.

  3. Wei, A., M. J. Sherony, and D. A. Antoniadis, "Effect of Floating-Body Charge on SOI MOSFET Design," IEEE Trans. on Elect. Dev., 45, 430-438, February 1998.

1997

  1. Melanie J. Sherony, Dimitri A. Antoniadis, Jeffrey W. Sleight, and Kaizad R. Mistry, "Extrapolaton of DC Device Lifetime in Body-Floating and Body-groudned SOI MOSFETS," 1997 IEEE International SOI Conference, October 7-9, 178-179, 1997.

  2. A. Wei and D. A. Antoniadis, “Design Methodology For Minimizing Hysteretic V T-Variation in Partially-Depleted SOI CMOS,” IEDM Technical Digest, 411-414, 1997.

  3. Lee, Z., and D. A. Antoniadis, "Inverse Modeling of MOSFETs using I-V Characteristics in the Subthreshold Region," IEDM Technical Digest, 683-686, 1997.

  4. Yang, I., A. Lochtefeld, S. Narendra, A. Chandrakasan, and D. A. Antoniadis, "Experimental Exploration of Ultra-Low Power CMOS Design Space using SOIAS Dynamic V T Control Technology," IEEE Proc. Int. SOI Conference, 76-77, October 1997.

  5. Antoniadis, D. A., "SOI CMOS as a Mainstream Low-Power Technology: A Critical Assessment," Proceedings of the IEEE Low-Power Circuit Design Symposium, invited, August 1997.

  6. M. J. Sherony, A. J. Chen, K. R. Mistry, and D. A. Antoniadis, "Reduced plasma-induced charging damage in SOI MOSFETs", Solid State Electronics, vol 41, no. 9, p. 1371, 1997

  7. Huang, C.-L., H. R. Soleimani, G. J. Grula, J. W. Sleight, A. Villani, H. Ali, and D. A. Antoniadis, “LOCOS-Induced Stress Effects on Thin-Film SOI Devices,” IEEE Trans. on Elect. Dev., 646-650, April 1997.

  8. Yang, I., C. Vieri, A. P. Chandrakasan, and D. A. Antoniadis, "Back-gated CMOS on SOIAS for Dynamic Threshold Voltage Control," IEEE Trans. on Elect. Dev., 831-832, May 1997.

  9. O'Neill, A. G., and D. A. Antoniadis, "Investigation of Si/SiGe-Based FET Geometries for High-Frequency Performance by Computer Simulation," IEEE Trans. on Elect. Dev., 44, 1, 80-88, January 1997.

1996

  1. M. J. Sherony, A. Wei, and D. A. Antoniadis, "Effect of Body-Charge on Fully- and Partially-Depleted SOI MOSFET Design," IEDM Technical Digest , 1996.

  2. A. Wei, and D. Antoniadis, "Bounding the Severity of Hysteretic Transient Effects in Partially-Depleted SOI CMOS", Presentation, IEEE Intl SOI Conference, October 1996.

  3. M. Sherony, I. Yang, D. Antoniadis, B. S. Boyle, "Modification of Parasitic Edge Leakage in LOCOS -Isolated SOI MOSFETs Using Back-Gate Stress," IEEE International SOI Conference, Sanibel Harbor, FLA, October 1-2, 1996.

  4. Sherony, M., T. S. Sririam, C. England, A. Pelillo, W. Harris, S. Miller, S. Bill, I. Yang, A. Wei, and D. A. Antoniadis, D.; "A Low Temperature Single-Step RTA Process to Form Ultra-Thin CoSi2 for MOSFET Applications," Proceedings of the Materials Research Society Symposium ,Vol 402 pp. 209-214, 1996.

  5. Sadek, A., K. Ismail, M. A. Armstrong, D. A. Antoniadis, and F. Stern, “Design of Si/SiGe Hetrojunction Complementary Metal-Oxide-Semiconductor Transistors,” IEEE Trans. on Elect. Dev., 1218-1223, August 1996.

  6. Huang, C.-L., J. V. Faricelli, D. A. Antoniadis, N. A. Khalil, and R. A. Rios, “An Accurate Gate Length Extraction Method for Sub-Quarter Micron MOSFET’s,” IEEE Trans. on Elect. Dev., 958-964, June 1996.

  7. Wei, L. A. Bair, D. A. Antoniadis, "Minimizing Floating -Body-Induced Threshold Voltage Variation in Partially-Depleted SOI CMOS," IEEE Electron Device Letters, 3/96.

  8. Yang, I., D. A. Antoniadis, and H. Smith; "Fabrication of Back-Gated Complementary Metal-Oxide Semiconductor Devices Using Mixed and Matched Optical and X-Ray Lithographies," J. Vac. Sci. Technol. B 14(6), Nov./Dec. 1996, pp. 4024-4028.

  9. O'Neill, A. G., and D. A. Antoniadis, "Deep Submicron CMOS Based on Silicon Germanium Technology," IEEE Trans. on Elect. Dev., 911-918, June 1996.

  10. Wei, A., and D. A. Antoniadis, "Measurement of Transient Effects in SOI DRAM/SRAM Access Transistors," IEEE Elect. Dev. Lett., 17 (5), 193-195, 1996.

1995

  1. Armstrong, M. A., D. A. Antoniadis, A. Sadek, K. Ismail, and F. Stern, "Design of Si/SiGe Heterojunction Complementary Metal-Oxide-Semiconductor Transistors," 1995 IEDM Tech. Dig., 761, 1995.


  2. Antoniadis, D. A., "SOI CMOS Front-End Technology: Options and Tradeoffs," Proceedings of the 1995 IEEE International SOI Conference, pp. 1-3, Tuscon, 1995. (Invited)

  3. Sherony, M. J., T. S. Siram, C. England, A. Pellilo, W. C. Harris, S. J. Miller, S. A. Bill, I. Y. Yang, A. Wei, and D. A. Antoniadis, "Ultra-Thin CoSi 2 from a Single-Step Low Temperature Anneal for MOSFET Applications," presented at the Materials Research Society Fall Meeting, Boston, 1995.

  4. Yang, I., S. Silverman, J. Ferrera, K. Jackson, J. Carter, D. A. Antoniadis, and H. Smith; "Combining and Matching Optical, Electron-Beam, and X-Ray Lithographies in the Fabrication of Si Complementary Metal-Oxide-Semiconductor Circuits with 0.1 and sub-0.1 m Features," J. Vac. Sci. Technol. B 13(6), Nov./Dec. 1995, pp. 2741-2744.

  5. Jacobs, J., and D. A. Antoniadis, "Channel Profile Engineering for Sub-100 m MOSFETs," IEEE Trans. on Elect. Dev., May 1995.

  6. Hu, H., J. Jacobs, L.T. Su, D.A. Antoniadis, "A Study of Deep-Submicron MOSFET Scaling Based on Experiment and Simulation", IEEE Transactions on Electron Devices, v. 42, no. 4, April 1995, pp. 669-677.

  7. Sherony, M.J., L.T. Su, J.E. Chung, and D.A. Antoniadis, "Reduction of Threshold Voltage Sensitivity in SOI MOSFET's", IEEE Electron Device Letters, v. 16, no. 3, March 1995, pp. 100-102.

1994

  1. Yang, I., H. Hu, L. Su, V. Wong, M. Burkhardt, E. Moon, J. Carter, D. A. Antoniadis, and H. Smith; "High Performance Self-Aligned Sub-100nm Metal-Oxide Semiconductor Field-Effect Transistors Using X-Ray Lithography," J. Vac. Sci. Technol. B 12(6), Nov./Dec. 1994, pp. 4051-4054.

  2. Burkhardt, M., H. Smith, D. A. Antoniadis, and T. Orlando; "Fabrication Using X-Ray Nanolithography and Measurement of Coulomb Blockade in a Variable-Sized Quantum Dot," J. Vac. Sci. Technol. B 12(6), Nov./Dec. 1994, pp. 3611-3613.

  3. Sherony, M., L. Su, J. Chung, and D. A. Antoniadis; "SOI MOSFET Effective Channel Mobility," IEEE Transactions on Electron Devices, vol. 41, no. 2, February 1994, pp. 276-278.

  4. Su., L.T., D.A. Antoniadis, N.D. Arora, B.S. Doyle, D.B. Krakauer, "SPICE Model and Parameters for Fully-Depleted SOI MOSFET'S Including Self-Heating", IEEE Electron Device Letters, v. 15, no. 10, October 1994, pp. 374-376.

  5. Su, L.T., M.J. Sherony, H. Hu, J.E. Chung, and D.A. Antoniadis, "Optimization of Series Resistance in Sub-0.2 µm SOI MOSFET's", IEEE Electron Device Letters, v. 15, no. 9, September 1994, pp. 363-365.

  6. Su, L.T., J.B. Jacobs, J.E. Chung, and D.A. Antoniadis, "Deep-Submicrometer Channel Design in Silicon-on-Insulator (SOI) MOSFET's", IEEE Electron Device Letters, v. 15, no. 9, September 1994, pp. 366-369.

  7. Su, Lisa T., J.E. Chung, D.A. Antoniadis, K.E. Goodson, M.I. Flik; "Measurement and Modeling of Self-Heating in SOI NMOSFET's," IEEE Transactions on Electron Devices, vol. 41, no. 1, January 1994, 69-75.

1993

  1. Faynot, O., C. Raynaud, L. T. Su, J. E. Chung, D. A. Antoniadis, "Comparison of Hot-Carrier Degradation Effects in Inversion-mode and Accumulation-mode Fully Depleted SOI MOSFETs," IEEE SOI Conference Proceedings, Palm Springs, 1993, pp. 164-165.

  2. Sherony, M. J., L. T. Su, J. E. Chung, and D. A. Antoniadis, "Inversion Electron Effective Mobility in SOI MOSFETs," IEEE SOI Conference Proceedings, Palm Springs, 1993, pp. 120-121.

  3. Su, L. T., J. B. Jacobs, J. E. Chung, and D. A. Antoniadis, "Short-Channel Effects in Deep Submicrometer SOI MOSFETs," IEEE SOI Conference Proceedings, Palm Springs, 1993, pp. 112-113.

  4. Antoniadis, D. A., "Physics and Technology for MOSFETs at 0.1 micron and Below," European Solid State Device Research Conference, Grenoble, France, 1993, pp. 3-10 (Invited Paper).

  5. Rahmat, K., J. White, and D. A. Antoniadis, "Computation of Drain and Substrate Currents in Ultra-Short-Channel NMOSFETs using the Hydrodynamic Model," IEEE Trans. on CAD, 817-824, 1993.

  6. Goodson, K. E., M. I. Flik, L. T. Su, and D. A. Antoniadis; "Annealing-Temperature Dependence of the Thermal Conductivity of LPCVD Silicon-Dioxide Layers," IEEE Elec. Dev. Lett., 14, (10), 490 - 492, 1993.

1992

  1. Fang, H., K. S. Krisch, C. G. Sodini, J. E. Chung, and D. A. Antoniadis; "Ultrathin Furnace Reoxidized Nitrided Oxide (ROXNOX) Gate Dielectrics for Extreme Submicrometer CMOS Technology," IEDM Technical Digest, p. 621, 1992.

  2. Su, L. T., H. Fang, J. E. Chung, and D. A. Antoniadis; "Hot-Carrier Effects in SOI NMOSFETs," IEDM Technical Digest, p. 349, 1992.

  3. Su, L. T., K. E. Goodson, D. A. Antoniadis, M. I. Flik, and J. E. Chung; "Measurement and Modeling of Self-Heating Effects in SOI NMOSFETs," IEDM Technical Digest, p. 357, 1992.

  4. Magnetotransport in Multiple Narro Silicon Inversion Channels Opened electrostatically into a two-demensional electron gas.

  5. Ghanbari, R. A., W. Chu, E. E. Moon, M. Burkhardt, K. Yee, D. A. Antoniadis, H. I. Smith, M. L. Schattenburg, K. W. Rhee, R. Bass, M. C. Peckerar, M. R. Melloch; "Fabrication of Parallel Quasi-one-dimensional Wires Using a Novel Conformable X-ray Mask Technology," J. Vac. Sci. Technol. B 10(6), 3196-3199, 1992.

  6. Ghanbari, R. A., M. Burkhardt, D. A. Antoniadis, H. I. Smith, M. R. Melloch, K. W. Rhee, and M. C. Peckerar; "Comparative Mobility Degradation in Modulation-Doped GaAs Devices After E-beam and X-ray Irradiation," J. Vac. Sci. Technol.B 10(6), 2890-2892, 1992.

  7. Fang, H., K. S. Krisch, B. J. Gross, C. G. Sodini, J. Chung, and D. A. Antoniadis; "Low-Temperature Furnace-Grown Reoxidized Nitrided Oxide Gate Dielectrics as a Barrier to Boron Penetration," IEEE Elec. Dev . Lett., 13, (14), 217-219, 1992.

1991

  1. Su L. T., J. A. Yasaitis, and D. A. Antoniadis; "A High-Performance Scalable Submicron MOSFET for Mixed Analog/Digital Applications” IEDM Technical Digest, pp. 367-370, 1991.

  2. Rahmat, K., J. White, and D. A. Antoniadis; "Computation of Drain and Substrate Currents in Ultra-Short-Channel nMOSFETs Using the Hydrodynamic Model” IEDM Technical Digest, pp. 115-118, 1991.

  3. Antoniadis, D. A., and J. E. Chung; "Physics and Technology of Ultra Short Channel MOSFET Devices,” IEDM Technical Digest, pp. 21-24, 1991. (Invited Paper).

  4. Y. Zhao, D. C. Tsui, S. J. Allen, Bellcore, K. Ismail, H. I. Smith, and D. A. Antoniadis, "Spectroscopy of 2DEG in a grid gate patterned heterostructure," submitted for March 1991 Meeting of the Amercian Physical Society.

  5. Ismail, K., P. F. Bagwell, T. P. Orlando, D. A. Antoniadis, H. I. Smith; "Quantum Phenomena in Field Effect Controlled Semiconductor for Nanostructures," Proc. IEEE 79, 1106-1116, August 1991.

  6. Liu, C. T., D. C. Tsui, M. Shayegan, K. Ismail, D. A. Antoniadis, and H. I. Smith; "Guiding-Center-Drift Resonance of Two-Dimensional Electrons in a Grid-Gate Superlattice Potential," Appl. Phys. Lett. 58 (25), June 1991.

1990

  1. C. T. Liu, D. C. Tsui, M. Santos, M. Shayegan, K. Ismail, D. A. Antoniadis, and H. I. Smith, "Magnetoresistance of Two-dimensional Electrons in a Two-Dimensional Lateral Surface Superlattice," Proc. of the Fall Meeting of the Materials Research Society, Boston, 1990, Vol. EA26, p. 95.

  2. Smith, H. I., K. Ismail, M. L. Schattenburg, and D. A. Antoniadis; "Sub-100 nm Electronic Devices and Quantum-Effect Research Using X-ray Nanolithography," Microcircuit Engineering '89, Cambridge, England, 26-28 September 1989. Microelectonic Engineering 11, 53-59, 1990.

  3. Toriumi, A., K. Ismail, M. Burkhardt, D. A. Antoniadis, and H. I. Smith; "Resonant Magneto-Conductance in a Two-Dimensional Lateral-Surface-Superlattice," 20th International Conference on the "Physics of Semiconductors," Thessaloniki, Greece, 6-10 August 1990.

  4. Liu, C. T., D. C. Tsui, M. Shayegan, K. Ismail, D. A. Antoniadis, and H. I. Smith, "Observation of Landau Level Splitting in Two-Dimensional Lateral Surface Superlattices," 20th International Conference on the "Physics of Semiconductors," Thessaloniki, Greece, 6-10 August 1990.

  5. Murguia, J. E., C. R. Musil, M. I. Shepard, H. Lezec, D. A. Antoniadis, and J. Melngailis; "Merging Focused Ion Beam Patterning and Optical Lithography in Device and Circuit Fabrication," J. Vac. Sci. Technol. B 8 (6), 1374-1379, 1990.

  6. Toriumi, A., K. Ismail, M. Burkhardt, D. A. Antoniadis, and H. I. Smith; "Resonant Magnetoconductance in a Two-Dimensional Lateral-Surface Superlattice," Phys. Rev. B, 41, 12346, 1990.

  7. Liu, C. T. , D. C. Tsui, M. Shayegan, K. Ismail, D. A. Antoniadis, and H. I. Smith; "Oscillatory Density-of-States of Landau Bands in a Two-Dimensional Lateral Surface Superlattice," Sol. State Comm., 75, 395-399, 1990.

  8. Field, S. B., M. A. Kastner, U. Meirav, J. H. F. Scott-Thomas, D. A. Antoniadis, H. I. Smith, and S. J. Wind, "Conductance Oscillations Periodic in the Density of One-Dimensional Electron Gases," Phys. Rev. B 42, 3523-3536, 1990.

  9. Smith, H. I., and D. A. Antoniadis; " Seeking a Radically New Electronics," Technology Review, Vol. 93, pp. 26-40 April, 1990.

  10. Liu, C. T., K. Nakamura, D. C. Tsui, D. A. Antoniadis, and H. I. Smith; "Far-Infrared Transmission Measurements on Grid-Gate GaAs/AlGaAs Lateral-Surface-Superlattice Structures," J. Surface Science 228, 527, 1990.

  11. Ismail, K., D. A. Antoniadis, H. I. Smith, C. T. Liu, K. Nakamura, and D. C. Tsui; "A Lateral-Surface Superlattice Structure on GaAs/AlGaAs for Far-Infrared and Magneto-Capacitance Measurements," J. Vac. Sci. Technol. B 7, 2000-2002, 1989.

1989

  1. Ismail, K., W. Chu, D. A. Antoniadis, H. I. Smith, C. T. Liu, K. Nakamura, and D. C. Tsui; "A Lateral-Surface Superlattice Structure on GaAs/AlGaAs for Far-Infrared and Magneto-Capacitance Measurements," Proc. of the 33rd International Symposium on Electron, Ion and Photon Beams, p. LP-1, Monterey, CA, 1989.

  2. Liu, C. T., K. Nakamura, D. C. Tsui, K. Ismail, D. A. Antoniadis, and H. I. Smith; "Far-Infrared Transmission Measurements on Grid-Gate GaAs/AlGaAs Lateral-Surface-Superlattice Structures," Proc. of the 4th International Conference on Modulated Semiconductor Structures, p. 819, Ann Arbor, MI, 1989.

  3. Antoniadis, D. A., K. Ismail, and H. I. Smith; "Lateral Surface Superlattices and Quasi-One-Dimensional Structures in GaAs." Presented at the "Science and Engineering of 1- and 0-Dimensional Semiconductors" NATO Advanced Research Workshop, 29 March to 1 April 1989, Cadiz, Spain.

  4. Smith, H. I., K. Ismail, W. Chu, A. Yen, Y. C. Ku, M. L. Shattenburg, and D. A. Antoniadis; "Fabrication of Quantum-Effect Electronic Devices Using X-ray Nanolithography," Proceedings of the International Symposium on Nanostructure Physics and Fabrication, pp. 57-65 Eds. M. A. Reed, and W. P. Kirk, Academic Press, San Diego, CA, 1989.

  5. Smith, H. I., K. Ismail, W. Chu, A. Yen, Y. C. Ku, and D. A. Antoniadis; "X-ray Nanolithography and Quantum-Effect Electronics," Molecular Electronics-Science and Technology, Engineering Foundation Conferences, Keauhou Kona, Hawaii, pp. 107-118, 19-24 February, 1989. Molecular Electronics-Science and Technology, Ed. Ari Aviram, Engineering Foundation, New York, NY, 1989.

  6. Ismail, K., W. Chu, R. Tiberio, A. Yen, H. J. Lezec, M. I. Shepard, C. R. Musil, J. Melngailis, D. A. Antoniadis, and H. I. Smith; "Resonant Tunneling Across and Mobility Modulation Along Surface-Structured Quantum Wells," J. Vac. Sci. Technol. B 7, 2025-2029, 1989.

  7. Liu, C. T., K. Nakamura, D. C. Tsui, K. Ismail, D. A. Antoniadis, and H. I. Smith, "Magneto-Optics of a Quasi Zero-Dimensional Electron Gas," Appl. Phys. Lett. 55, 168, 1989.

  8. Scott-Thomas, J. H. F., M. A. Kastner, D. A. Antoniadis, H. I. Smith, and S. B. Field; "Conductance Oscillations Periodic in the Density of a One-Dimensional Electron Gas'" Phys. Rev. Lett. 62, 583, 1989.

  9. Ismail, K., D. A. Antoniadis , and H. I. Smith; "Lateral Resonant Tunneling in a Double-Barrier Field-Effect Transistor," Appl. Phys. Lett 55, 589-591, 1989.

  10. Ismail, K., D. A. Antoniadis, and H. I. Smith; "One-Dimensional Subbands and Mobility Modulation in GaAs/AlGaAs Quantum Wires," Appl. Phys. Lett. 54, 1130-1132, 1989.

  11. Ismail K., W. Chu, A. Yen, D. A. Antoniadis, and H. I. Smith; "Negative Transconductance and Negative Differential Resistance in a Grid-Gate Modulation-Doped Field-Effect Transistor," Appl. Phys. Lett. 54, 460-462, 1989.

1988

  1. Boning, D. S. and D. A. Antoniadis; "A Workstation Approach to IC Process and Device Design," IEEE Design & Test of Computers, 36-47, 1988.

  2. Lezec, H. J., K. Ismail, L. J. Mahoney, M. I. Shepard, D. A. Antoniadis, and J. Melngailis; "A Turnable-Frequency Gunn Diode Fabricated by Focused Ion-Beam Implantation," IEEE Elect. Dev. Lett. EDL-9, 476-478, 1988.

  3. Shahidi G. G. , D. A. Antoniadis, and H. I. Smith; "Reduction of Channel-Hot-Electron-Generated Substrate Current in Sub-150 nm Channel Length Si MOSFETs," IEEE Elec. Dev. Lett. EDL-9, 497-499, 1988.

  4. Scott-Thomas, J. H. F., M. A. Kastner, D. A. Antoniadis, H. I. Smith, and S. Field; "Si MOSFETs with 70 nm Slotted Gates for Study of Quasi-One-Dimensional Quantum Transport", J. Vac. Si. Technol. B 6, 1841, 1988.

  5. Ismail, K., W. Chu, D. A. Antoniadis, and H. I. Smith; "Lateral-Surface Superlattice and Quasi-One Dimensional GaAs/GaAlAs MODFETs Fabricated Using X-ray and Deep-UV Lithography," J. Vac. Sci. Technol. B 6 ,1824, 1988.

  6. Shahidi, G. G., D. A. Antoniadis, and H. I. Smith; "Electron Velocity Overshoot in Sub-100 nm Channel Length MOSFETs at 77 K and 300 K," J. Vac. Sci. Technol. B 6, 137, 1988.

  7. Shahidi G. G. , D. A. Antoniadis, and H. I. Smith; "Electron Velocity Overshoot at Room and Liquid Nitrogen Temperatures in Silicon Inversion Layers," IEEE Elect. Dev. Lett. EDL-9, 94-96, 1988.

  8. Ismail K. , W. Chu, D. A. Antoniadis, and H. I. Smith ; "Surface Superlattice Effects in a Grating-Gate GaAs/GaAlAs Modulation Doped Field-Effect Transistor", Appl. Phys. Lett. 52, 1071-1073, 1988.

  9. Tung, T-L., J. Connor, and D.A. Antoniadis; "A Boundary Element Method for Modeling Viscoelastic Flow in Thermal Oxidation", IEEE Trans. Comp.-Aided Design of IC and S, 7, 215-224, 1988.

1987

  1. Antoniadis, D. A.; "Quantum Mechanical and Non-Steady-State Transport Phenomena in Nanostructured Silicon Layers," Extended Abs. of the 19th Conf. on Solid State Dev. and Mat., Tokyo, 1987, pp. 1-4

  2. Rodder, M. and D.A. Antoniadis; "Hot-Carrier Effects in Hydrogen-Passivated p-Channel Polycrystalline-Si MOSFETs", IEEE Trans. Electron Dev., ED-34, 1079-1083, 1987.

  3. Chou, S. Y., D.A. Antoniadis, and H. I. Smith; "Application of the Shubnikov-de Haas Oscillations in the Characterization of Si MOSFETs and GaAs MODFETs", IEEE Trans. Electron Dev., ED-34, 883-889, 1987.

  4. Chou, S. Y., and D. A. Antoniadis; "Relationship Between Measured and Intrinsic Transconductance of FETs," IEEE Trans. Electron Dev., ED-34, 448-450, 1987.

  5. Chou, S. Y, D. A. Antoniadis, H. I. Smith, and M. A. Kastner; "Conductance Fluctuations in Ultra-Short-Channel Si MOSFETs," Solid State Comm. 61, 571, 1987.

1986

  1. Shahidi, G. G., D. A. Antoniadis, and H. I. Smith, "Electron Velocity Overshoot at 300K and 77 K in Silicon MOSFETs with Submicron Channel Lengths," 1986 IEEE International Electron Devices Meeting, Los Angeles, CA, December 1986, IEDM Technical Digest, 824, 1986.

  2. Chou, S. Y., C. S. Lam, D. A. Antoniadis, H. I. Smith, and C. G. Fonstad; "Characterization of Modulation-Doped FET's Using Shubnikov-de Haas Oscillations," Proc. 13th International Symposium on Gallium Arsenide and Related Compounds, Las Vegas, NV, September 28-October 1, 1986, Ed. W. T. Lindley, Inst. Phys. Conf. Ser. No. 83, Chapter 4, p. 239-244.

  3. Warren, A. C., D. A. Antoniadis, H. I. Smith; "Quasi One-Dimensional Conduction in Multiple, Parallel Inversion Lines," Phys. Rev. Lett. 56, 1858-1861, 1986.

  4. Warren, A. C., D. A. Antoniadis, and H. I. Smith; "Semi-Classical Calculation of Charge Distribution in Ultra-Narrow Inversion Lines," IEEE Elect. Dev. Lett. EDL-7, 413, 1986.

  5. Lowther, R. E., J. B. Jacobs, and D. A. Antoniadis; "Simulation of Implantation and Diffusion of Profiles Made with a Focused Ion Beam Implanter," IEEE Trans. Electon Dev. ED-33, 1251-1255, 1986.

  6. Madan, S., and D. A. Antoniadis; "Leakage Current Mechanisms in Hydrogen-Passivated Fine-Grain Polycrystalline Silicon-On-Insulator MOSFETs," IEEE Trans. Electron Dev. ED-33, 1518-1528, 1986.

  7. Nishi, K., and D. A. Antoniadis; "Observation of Silicon Self-Interstitial Supersaturation During Phosphorus Diffusion from Growth and Shrinkage of Oxidation-Induced Stacking Faults," J. Appl. Phys. 59(4), 1117-1124, 1986.

  8. Warren, A. C., I. Plotnik, E. H. Anderson, M. L. Schattenburg, D. A. Antoniadis, and H. I. Smith; "Fabrication of Sub-100 nm Linewidth Periodic Structures for Study of Quantum Effects from Interference and Confinement in Si Inversion Layers," J. of Vac. Sci. and Technology B4(1), 365-368, 1986.

  9. Chou, S. Y., H. I. Smith, and D. A. Antoniadis; "Sub-100 nm Channel Length Transistors Fabricated Using X-Ray Lithography," J. Vac. Sci. and Technology, B 4, 253, 1986.

1985

  1. Boning, D., and D. A. Antoniadis; "MASTIF - A Workstation Approach to Fabrication Process Design," IEEE International Conference on CAD, ICCAD-85, p. 288, 1985.

  2. Chou, S. Y., D. A. Antoniadis, and H. I. Smith; "The Use of Shubnikov-De Hass Effect to Investigate Sub-100-nm Channel Lengths in Si MOSFETs," Technical Digest, IEEE International Electron Devices Meeting, Washington, DC, 1985, pp. 562-564.

  3. Antoniadis, D. A., A. C. Warren, H. I. Smith; "Quantum Mechanical Effects in Short and Narrow MOSFTEs," Technical Digest, IEEE International Electron Devices Meeting, Washington, DC, 1985, pp. 558-561 (Invited Paper).

  4. Warren, A. C., D. A. Antoniadis, H. I. Smith, and J. Melngailis; "One-Dimensional Conductivity in Multiple, Parallel Inversion Lines," 43rd Device Research Conference, Boulder, CO, 1985, Abstract IIIB-4, in IEEE Trans. Electron Dev., ED-32, p. 2537, 1985.

  5. Chou, S. Y, D. A. Antoniadis, and H. I. Smith; "Observation of Electron Velocity Overshoot in Sub-100-nm-Channel MOSFETs in Silicon," IEEE Electron Dev. Lett. EDL-6, 665-667, 1985.

  6. Rodder, M. and D. A. Antoniadis; "Comparison of Different Techniques for Passivation of Small Grain Polycrystalline-Si MOSFETs," IEEE Elec. Dev. Lett. EDL-6, 570-572, 1985.

  7. Chou, S. Y., H. I. Smith, and D. A. Antoniadis; "X-Ray Lithography for Sub-100-nm-Channel-Length Transistors Using Masks Fabricated with Conventional Photolithography, Anisotropic Etching, and Oblique Shadowing," J. of. Vac. Sci. and Technology B3(6), 1857-59, 1985.

  8. Robinson, A. L., D. A. Antoniadis, and E. W. Maby; "Fabrication of Fully Self-Aligned Joint-Gate CMOS Structures," IEEE Trans. Electron Dev. ED-32, 1140-1142, 1985.

  9. Tung, T-L., and D. A. Antoniadis; "A Boundary Integrated Equation Approach to Oxidation Modeling," IEEE Trans. Electron Dev. ED-32, 1954-1959, 1985.

  10. Paulos, J. J., and D. A. Antoniadis; "Measurements of Minimum-Geometry MOS Transistor Capacitances," IEEE Trans. Electron Dev. ED-32, 357-363, 1985.

  11. Warren, A. C., D. A. Antoniadis, H. I. Smith, and J. Melngailis; "Surface Superlattice Formation in Silicon Inversion Layers Using 0.2-mm Period Grating-Gate Electrodes," IEEE, Electron Device Lett. EDL-6, 294-296, 1985.

  12. Taniguchi, K. , and D. A. Antoniadis; "Lateral Extent of Oxidation-Enhanced Diffusion of Phosphorus in <100> Silicon," Appl. Phys. Lett., 46(10), 944-946, 1985.

  13. Nishi, K., and D. A. Antoniadis; "Fast Shrinkage of Oxidation-Induced Stacking Faults in Silicon at the Initial Stage of Annealing in Nitrogen," Appl. Phys. Lett., 46(5), 516-518, 1985.

1984

  1. Tung, T-L., and D. A. Antoniadis; "Modeling Local Oxidation of Silicon," Extended Abstracts, Fall Meeting of the Electrochemical Soc., New Orleans, LA, 1984, pp. 705-706.

  2. Antoniadis, D. A.; "The Effect of Point Defect Kinetics on the Diffusion of Impurities in Silicon," Materials Res. Soc., Fall Meeting, Boston, 1984 (Invited Paper).

  3. Rodder, M., S. Madan, D. A. Antoniadis, and T. Kikkawa; "Effects of Si 3N 4 and Al Films on the Passivation of Poly- Si Films," 42nd Device Research Conference, Santa Barbara, CA, 1984, Abstract in IEEE Trans. Electron Dev., ED-31, p. 1982, 1984.

  4. Maby, E. W., and D. A. Antoniadis; "Staggered CMOS: A Novel Three-Dimensional Technology," Proceedings of Materials Res. Soc. Meeting, Albuquerque, NM, 1984, pp. 161-166.

  5. Antoniadis, D. A.; "Three-Dimensional Integrated Circuit Technology," Materials Res. Soc. Symposia Proc.: Energy Beam-Solid Interactions and Transient Thermal Processing, J. C. C. Fan and N. M. Johnson, editors, North-Holland, New York, pp. 587-593, 1984 (Invited Paper).

  6. Nishi, K., and D. A. Antoniadis; "Effects of Phosphorus Diffusion on Growth and Shrinkage of Oxidation-Induced Stacking Faults," J. Appl. Phys., 56(12), 3428-3438, 1984.
  7. Antoniadis, D. A.; "Calculation of Threshold Voltage in Non-Uniformly Doped MOSFETs," IEEE, Trans. Electron Dev., ED-31, 303-307, 1984.

1983

  1. Robinson, A. L., D. A. Antoniadis, and E. W. Maby; "Fabrication of Fully Self-Aligned Joint-Gate CMOS Structure, " Technical Digest, IEEE Internation Electron Devices Meeting, Washington, DC, 1983, pp. 530-533.

  2. Taniguchi, K., and D. A. Antoniadis; "Kinetics of Silicon Interstitial Defects from Oxidation Stacking Fault Observations," Proceedings of Symposium on Defects in Silicon, The Electrochemical Society, San Francisco, May 1983, pp. 315-324.

  3. Harris, R. M., and D. A. Antoniadis; "Silicon Self-Interstitial Enhancement During Phosphorus Diffusion," Appl. Phys. Lett., 43(10), 937-939, 1983.

  4. Paulos, J., and D. A. Antoniadis; "Limitations of Quasi-Static Capacitance Models for the MOS Transistor," IEEE, Electron Device Lett., EDL-4, 221-224, 1983.

  5. Rodder, M., and D. A. Antoniadis; "Silicon on Insulator Bipolar Transistors," IEEE, Electron Device Lett. EDL 4, 193-195, 1983.

  6. Taniguchi, K., and D. A. Antoniadis, and Y. Matsushita; "Kinetics of Self-Interstitials Generated at the Si/SiO 2 Interface," Appl. Phys. Lett., 42(11), 961-963, 1983.

1982

  1. Antoniadis, D. A.; "One-Dimensional Simulation of IC Fabrication Processes," in Proceedings of the NATO Advanced Studies Institute on Process and Device Simulation for MOS-VLSI Circuits, Urbino, Italy, 1982; P. Antognetti, D. Antoniadis, R. Dutton and W. Oldham, editors, Nijhoff, The Hague, pp. 1-47 (Invited Paper) 1983.

  2. Antoniadis, D. A.; "Diffusion in Silicon," in Proceedings of the NATO Advanced Studies Institute on Process and Device Simulation for MOS-VLSI Circuits, Urbino, Italy, 1982, P. Antognetti, D. Antoniadis, R. Dutton and W. Oldham, editors, Nijhoff, The Hague, pp. 1-47 (Invited Paper) 1983.

  3. Antoniadis, D. A.; "Computer Simulation of Complete IC Fabrication Processes," in Proceedings of the NATO Advanced Studies Institute on Large Scale Integrated Circuits Technology: State of the Art and Prospects, Erice, Italy, 1981, L. Esaki and G. Soncini, editors, Nijhoff, The Hague, pp. 223-253 (Invited Paper) 1982.

  4. Antoniadis, D. A.; "Silicon Epitaxy," Proceedings of the NATO Advanced Studies Institute on Large Scale Integrated Circuits Technology: State of the Art and Prospects, Erice, Italy, 1981, L. Esaki and G. Soncini, editors, Nijhoff, The Hague, pp. 200-222 (Invited Paper) 1982.

  5. Antoniadis, D. A., and I. Moskowitz; "Kinetics of Silicon Point Defects from Oxidation Induced Stacking Faults and Impurity Diffusion," Proceedings of Symposium on Aggregation Phenomena of Point Defects in Silicon," The Electrochemical Society, Munich, 1982, pp. 1-16 (Invited Paper).

  6. Antoniadis, D. A.,; "Modeling of Processes for Silicon Integrated Circuit Fabrication," American Physical Society Meeting, Philadelphia, Bulletin of the American Phys. Soc., 27(8), 875, 1982 (Invited Paper).

  7. Antoniadis, D. A., and I. Moskowitz; "Modeling of Impurity Diffusion in Silicon During Oxidation Based on Point Defect Kinetics," Proceedings of the First International Symposium on VLSI Science and Technology, The Electrochemical Society, Detroit, 1982, pp. 5-16.

  8. Paulos, J. J., D. A. Antoniadis, and Y. P. Tsividis; "Measurement of Intrinsic Capacitances of MOS Transistors," Digest of Technical Papers, IEEE International Solid-State Circuits Conference, San Francisco, CA, 1982, pp. 238-239.

  9. Antoniadis, D. A., and Moskowitz; "Diffusion of Indium in Silicon in Inert and Oxidizing Ambients," J. Appl. Phys. 53(12), 9214-9216, 1982.

  10. Antoniadis, D. A., and I. Moskowitz; "Diffusion of Substitutional Impurities in Silicon at Short Oxidation Times -- An Insight into Point Defect Kinetics," J. Appl. Phys. 53(10), 6788-6796, 1982.

  11. Maby, E. W., and D. A. Antoniadis; "Electrical Properties of Line Defects in Thin Zone-Recrystallized Silicon Films on Silicon Dioxide," Appl. Phys. Lett. 40(8), 691-693, 1982.

  12. Tsividis, Y. P., and D. A. Antoniadis; "A Multiproject Chip Approach to the Teaching of Analog MOS LSI and VLSI," IEEE Trans. on Education, E-25, 48-53, 1982.

  13. Antoniadis, D. A.; "Oxidation Induced Point Defects in Silicon," J. Electrochem. Soc. 129, 1093-1097, 1982.

  14. Geis, M. W., H. I. Smith, B-Y. Tsaur, J. C. Fan, E. W. Maby, and D. A. Antoniadis; "Zone-Melting Recrystallization of Silicon Films on SiO 2 -- Morphology and Crystallography," Appl. Phys. Lett, 40(2), 158-160, 1982.

1981

  1. Maby, E. W., M. W. Geis, Y. L. Lecoz, D. J. Silversmith, R. W. Mountain, and D. A. Antoniadis; "MOSFETs on Silicon Prepared by Moving Melt Zone Recrystallization of Encapsulated Polycrystalline Silicon on an Insulating Substrate," IEEE Electron Dev. Lett. EDL-2, 10, 241-243, 1981.

  2. Wada, Y., and D. A. Antoniadis; "Anomalous Arsenic Diffusion in Silicon Dioxide," J. Electrochem. Soc. 128, 1317-1320, 1981.

  3. Lin, A. M., D. A. Antoniadis, and R. W. Dutton; "The Oxidation Rate Dependence of Boron, and Phosphorous Oxidation-Enhanced Diffusion in <100> Silicon," J. Electrochem. Soc. 128, 1131-1137, 1981.

  4. Lin, A. M., R. W. Dutton, D. A. Antoniadis, and W. A. Tiller; "The Role of Point Defects in the Growth/Retrogrowth of Oxidation-Induced Stacking Faults in Silicon -- A Quantitative Model," J. Electrochem. Soc. 128, 1121-1130, 1981.

1980

  1. Geis, M. W., D. A. Antoniadis, D. J. Silversmith, R. W. Mountain, and H, I Smith; "Silicon Graphoepitaxy Using a Strip-Heater Oven," Appl. Phys. Lett. 37(5), 454-456, 1980.

1979

  1. Geis, M. W., D. C. Flanders, D. A. Antoniadis, and H. I. Smith; "Crystalline Silicon on Insulators by Graphoepitaxy," Technical Digest, International Electron Devices Meeting, Washington, DC, 1979, pp. 210-212 (Invited Paper).

  2. Lin, A. M., D. A. Antoniadis, R. W. Dutton, and W. A. Tiller; "The Rate Control Model of Oxidation Stacking Fault Growth in Silicon," Extended Abstracts, Fall Meeting of the Electrochemical Society, Los Angeles, 1979, pp. 1349-1351.

  3. Lin, A. M., R. W. Dutton, and D. A. Antoniadis; "Oxidation Rate Dependence of B and P Oxidation-Enhanced Diffusion in <100> Silicon, Extended Abstracts, Spring Meeting of the Electrochemical Society, Boston, 1979, pp. 356-359.

  4. Reif, R., R. W. Dutton, and D. A. Antoniadis; "Computer Simulation in Silicon Epitaxy," Extended Abstracts, Spring Meeting of the Electrochemical Society, Boston, 1979, pp. 352-355.

  5. Dutton, R. W., and D. A. Antoniadis; "Process Simulation for Device Design and Control," Digest of Technical Papers, IEEE International Solid-State Circuits Conference, Philadelphia, 1979, pp. 244-245.

  6. Geis, M. W., D. Flanders, H. I. Smith, and D. A. Antoniadis; "Graphoepitaxy of Silicon on Fused Silica Using Surface Micropatterns and Laser Crystallization," J. of Vac. Sci. and Technology 16, 1640-1643, 1979.

  7. Lin, A. M., D. A. Antoniadis, and R. W. Dutton; "Lateral Effect of Oxidation on Boron Diffusion in <100> Silicon," Appl. Phys. Lett. 35, 799-801, 1979.

  8. Lee, H. G., R. W. Dutton, and D. A. Antoniadis; "On Redistribution of Boron During Thermal Oxidation of Silicon," J. Electrochem. Soc. 126, 2001-2007, 1979.

  9. Antoniadis, D. A., M. Rodoni, and R. W. Dutton: "Impurity Redistribution in SiO 2-Si During Oxidation -- Numerical Solution Including Interfacial Fluxes," J. Electrochem. Soc. 126, 1939-1945, 1979.

  10. Antoniadis, D. A., and R. W. Dutton; "Models for Computer Simulation of Complete IC Fabrication Process," IEEE Trans. on Electron Devices, Special Issue on VLSI, Ed-26, 490-500, 1979.

1978

  1. Antoniadis, D. A., A. M. Lin, and R. W. Dutton; "Oxidation Enhanced Diffusion of Arsenic and Phosphorus in Near-Intrinsic <100> Silicon," Appl. Phys. Lett. 33, 1030-1033, 1978.

  2. Antoniadis, D. A., A. G. Gonzalez, and R. W. Dutton; "Boron in Near-Intrinsic <100> and <111> Silicon Under Inert and Oxidizing Ambients -- Diffusion and Segregation," J. Electrochem. Soc. 122, 813-819, 1978.

1977

  1. Antoniadis, D. A., and R. W. Dutton; "Simulation of Integrated Circuits Fabrication Processes," Proceedings of NATO Advanced Study Institute on Process and Device Modeling for Integrated Circuit Design, Belgium, 1977, F. van deFiele, W. Engl and P. Jespers, editors, Noordhoff, Leyden, the Netherlands, pp. 837-864 (Invited Paper) 1977.

  2. Antoniadis, D. A., and R. W. Dutton; "Technology Modeling for IC Fabrication," Proceedings of Journee D'Electronique, Lausanne, 1977, pp. 29-41 (Invited Lecture).

  3. Dutton, R. W. , A. G. Gonzalez, R. D. Rung, and D. A. Antoniadis; "IC Process Engineering Models and Applications," Proceedings of the Third International Symposium on Silicon Materials Science and Technology, The Electrochemical Society, Philadelphia, 1977, pp. 910-922.

  4. Dutton, R. W., D. A. Divekar, A. G. Gonzalez, S. E. Hansen, and D. A. Antoniadis; "Correlation of Fabrication Process and Electrical Device Parameter Variations," IEEE J. Solid-State Circuits SC-12, 349, 1977.

  5. Antoniadis, D. A.; "Determination of Thermospheric Quantities From Simple Ionospheric Observations Using Numerical Simulation," J. Atmos. Terr. Phys. 39, 531-537, 1977.

1976

  1. Bernhardt, P. A., D. A. Antoniadis, A. V. da Rosa; "Determination of Lunar-Dynamo Electric Fields from Total Electron Content Measurements," Proceedings of COSPAR Symposium on the Geophysical Use of Satellite Beacon Observations, Boston, 1976, p. 152.

  2. Antoniadis, D. A. , and A. V. da Rosa; "Vertical Ion Drifts, Exospheric Temperatures and Neutral Winds Calculated from Simple Observations and Numerical Simulation of the Ionosphere," Proceedings of COSPAR Symposium on the Geophysical Use of Satellite Beacon Observations, Boston, 1976, p. 138.

  3. Antoniadis, D. A.; "Thermospheric Winds and Exospheric Temperatures from Incoherent Scatter Radar Measurements in Four Season," J. Atmos. Terr. Phys. 38, 18-195, 1976.

  4. Bernhardt, P. A., D. A. Antoniadis, and A. V. da Rosa; "Lunar Perturbations in Columnar Electron Content and Their Interpretation in Terms of Dynamo Electrostatic Fields," J. Geophys. Res. 81, 5957-5963, 1976.

1974

  1. Antoniadis, D. A.; "A Novel Method for Measuring the Polarization Angle of Satellite Radio Waves," IEEE Trans. on Aerospace and Electronic Systems, Vol. AES-19, 510-515, 1974.

1972

  1. Anastassiadis, M., and D. A. Antoniadis; "Time Delay Measurements in the Athens ( Greece) - Roma ( Lesotho) VHF Transequatorial Propagation Circuit," J. Atmos. Terr. Phys., 34, 1215-1222, 1972.

Books

 

  1. Shahidi, G. G., F. Assaderaghi, and D. A. Antoniadis, “SOI Technology and Circuits”, Design of High-Performance Microprocessor Circuits, IEEE Press, A. Chandrakasan, W. J. Bowhill, and F. Fox, editors, 2000

  2. D. A. Antoniadis, “SOI-CMOS For Low Power Systems,” in Low Power CMOS Design, IEEE Press, A. Chandrakasan and R. Brodersen, editors. 1998.

  3. Bagwell, P. F., D. A. Antoniadis, and T. P. Orlando, chapter titled “Quantum Mechanical and Nonstationary Transport Phenomena in Nanostructured Silicon Inversion Layers,” in VLSI Elctronics, Microstructure Science , Vol. 18, N. G. Einspruch, editor, Academic Press, publisher, pp306-354, 1988.

  4. Antoniadis, D. A., chapter titled "MOS Transistor Fabrication" in The MOS Transistor, Y. P. Tsividis, author, McGraw-Hill, publisher, 1986.

  5. Antoniadis, D. A.; chapter titled "Silicon Integrated Circuit Process Modeling" in Volume: Silicon Materials, in VLSI Electronics, Microstructure Science; N. G. Einspruch, editor, Academic Press, publisher, pp. 271-306, 1986.

  6. Antoniadis, D. A.; chapter titled "Diffusion in Silicon" in Integrated Circuit Process Models, J. D. Meindl, editor, Prentice-Hall, publishers, 1986.

  7. Dutton, R. W., and D. A. Antoniadis; "Modeling of Moving Boundaries during Semiconductor Fabrication Process," in Moving Boundary Problems, edited by D. G. Wildon, A. D. Solomon and P. T. Boggs, editors, Academic Press, NY, pp. 233-248, 1978.