We have compiled a report on the cmos baseline running in the UC Berkeley
Microlab. Abstract:
This is the second report describing the baseline CMOS process supported by
the Berkeley Microlab. The baseline process defines "standard" process modules
for a twin-well, 1um CMOS technology with double poly-Si, double metal options.
Process details are presented along with device characterization methodology
and measurements. Process and device parameters are listed.
The report is available on line at
http://www-microlab.eecs.berkeley.edu:8080/baseline/
If you would like a hard copy pls send me your address.
Sincerely
Katalin Voros
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