Re: Through-hole via on Si

From: Ashutosh Shastry (as@ee.iitb.ac.in)
Date: Fri Jul 13 2001 - 00:35:26 EDT

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Hi,

We have done that in the past for some BioMEMS application.

We use EDP with oxide mask for <100> wafers.

Regards,

-Ashutosh-

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        Ashutosh Shastry Research Associate,
        Graduate Student, Microelectronics Group,
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        Bioengineering,
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On Thu, 12 Jul 2001, Hiren Thacker wrote:

Hi:

I am trying to create anisotropic through hole vias on a Si wafer. Has
anyone done this kind of Si etch before? Please email me at
hdt@ece.gatech.edu if you have as I'd like to get more information about
this process.

thanks,

Hiren Thacker
Georgia Institute of Technology

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