Publications - MIT Statistical Metrology

Last updated June 16, 2004.

Also see Selected Theses

2004

T. F. Hill, H. Sun, H. K. Taylor, M. A. Schmidt, and D. S. Boning, "Pattern Density Based Predication for Deep Reactive Ion Etch (DRIE)," Solid-State Sensor, Actuator and Microsystems Workshop, Hilton Head, SC, June 2004. | pdf | poster pdf

H. Cai, T. Park, D. Boning, Y. Kang, J. Lee, S. K. Kim, and H. Kim, "Coherent Chip-Scale Modeling for Copper CMP Pattern Dependence," Paper K2.4, Chemical-Mechanical Polishing Symposium, MRS Spring Meeting, San Francisco, April 2004. | talk pdf

X. Xie, T. Park, D. Boning, A. Smith, P. Allard, and N. Patel, "Characterizing STI CMP Processes with an STI Test Mask Having Realistic Geometric Shapes," Paper K9.4, Chemical-Mechanical Polishing Symposium, MRS Spring Meeting, San Francisco, April 2004.

B. Tang and D. Boning, "CMP Modeling and Characterization for Polysilicon MEMS Structures," Paper K7.6, Chemical-Mechanical Polishing Symposium, MRS Spring Meeting, San Francisco, April 2004. | pdf | talk ppt

T. Park, T. Tugbawa, D. Boning, C. Chidambaram, C. Borst, and G. Shin, "Chip-Scale Modeling of Electroplated Copper Surface Profiles," Journal of the Electrochemical Society, vol. 151, no. 6, pp. C418-C430, June 2004. | pdf

Sorooshian, J., D. DeNardis, L. Charns, Z. Li, F. Shadman, D. Boning, D. Hetherington, and A. Philipossian, "Arrhenius Characterization of ILD and Copper CMP Processes," Journal of the Electrochemical Society, vol. 151, no. 2, pp. G85-G88, Feb. 2004. | pdf

D. Boning, X. Xie, J. Sorooshian, A. Philipossian, D. Stein, and D. Hetherington, "Relationship Between Patterned Wafer Topography Evolution and STI CMP Motor Current Endpoint Signals," Chemical-Mechanical Planarization for ULSI Multilevel Interconnect Conference, pp. 341-350, Marina Beach, CA, Feb. 2004. | pdf

J. Sorooshian, A. Philipossian, L. Borucki, R. Timon, D. Stein, D. Hetherington, and D. Boning, "Impact of Pattern Density on the Effective Pressure During STI CMP," Chemical-Mechanical Planarization for ULSI Multilevel Interconnect Conference, pp. 358-361, Marina Beach, CA, Feb. 2004.

2003

B. E. Goodlin, D. S. Boning, H. H. Sawin, and B. M. Wise, "Simultaneous Fault Detection and Classification for Semiconductor Manufacturing Tools," Journal of the Electrochemical Society, vol. 150, no. 12, pp. G778-G784, Dec. 2003. | pdf

H. Sun, T. Hill, M. Schmidt, and D. Boning, "Characterization and Modeling of Wafer and Die Level Uniformity in Deep Reactive Ion Etching (DRIE)," paper A10.2, MRS Fall Meeting, Symposium A: Micro- and Nano-systems, Boston, MA, Dec. 2003. | pdf

D. Boning, "Spatial Uniformity as a Key Challenge in Semiconductor Process Control," AVS 50th International Symposium, Manufacturing Science and Technology, Baltimore, MD, Nov. 2003. | talk-pdf

T. Park, T. Tugbawa, H. Cai, X. Xie, D. Boning, C. Chidambaram, C. Borst, and G. Shinn, "Integrated Chip-Scale Prediction of Copper Interconnect Topography," MRS Spring Meeting, Symposium F: Chemical Mechanical Planarization, San Francisco, CA, April 2003. | pdf

X. Xie, T. Park, Brian Lee, T. Tugbawa, H. Cai and D.Boning, "Re-examining the Physical Basis of Planarization Length in Pattern Density CMP Models," MRS Spring Meeting, Symposium F: Chemical Mechanical Planarization, San Francisco, CA, April 2003. | pdf

D. White, J. Melvin, and D. Boning, "Characterization and Modeling of Dynamic Thermal Behavior in Chemical Mechanical Polishing (CMP)," Journal of the Electrochemical Society, vol. 150, no. 4, pp. G271-G278, April 2003. | pdf

D. Boning, "Pattern Dependent Characterization of Copper Interconnect," Tutorial, International Conference on Microelectronic Test Structures (ICMTS), Monterey CA, March 2003. | talk-pdf

D. Boning, "Layout Practice Impact on Timing and Yield," Tutorial, International Symposium on Quality Electronic Design (ISQED), San Jose CA, March 2003. | talk-pdf

X. Xie and D. Boning, "Integrated Modeling of Nanotopography Impact in Patterned STI CMP," Chemical-Mechanical Planarization for ULSI Multilevel Interconnect Conference, Marina Beach, CA, Feb. 2003. | pdf | talk-pdf

J. Sorooshian, D. DeNardis, L. Charns, Z. li, A. Philipossian, and D. Boning, "De-coupling the Chemical and Mechanical Attributes of CMP Through Controlled Removal Rate Versus Temperature Experiments," Chemical-Mechanical Planarization for ULSI Multilevel Interconnect Conference, Marina Beach, CA, Feb. 2003.

2002

D. Boning and B. Lee, ``Nanotopography Issues in Shallow Trench Isolation CMP,'' MRS Bulletin, pp. 761-765, Oct. 2002. | pdf
T. Tugbawa, T. Park, and D. Boning, ``Integrated Chip-Scale Simulation of Pattern Dependencies in Copper Electroplating and Copper Chemical Mechanical Polishing Processes,'' International Interconnect Technology Conference, San Francisco, CA, June 2002. | pdf
D. O. Ouma, D. S. Boning, J. E. Chung, W. G. Easter, V. Saxena, S. Misra, and A. Crevasse, ``Characterization and Modeling of Oxide Chemical Mechanical Polishing Using Planarization Length and Pattern Density Concepts,'' IEEE Transactions on Semiconductor Manufacturing, vol. 15, no. 2, pp. 232-244, May 2002. | pdf
B. Goodlin, H. Sawin, D. Boning, and B. Wise, ``Simultaneous Fault Detection and Identification for Plasma Etching Processes,'' 201st Meeting of the Electrochemical Society, International Symposium on Plasma Processing XIV, paper 413, Philadelphia, PA, May 2002. | pdf
B. Goodlin, H. Sawin, and D. Boning, ``Quantitative Analysis and Comparison of Endpoint Detection Based on Multiple Wavelength Analysis,'' 201st Meeting of the Electrochemical Society, International Symposium on Plasma Processing XIV, paper 415, Philadelphia, PA, May 2002. | pdf
D. Boning, B. Lee, N. Poduje, J. Valley, and W. Baylies, ``Impact of Nanotopography on STI CMP in Future Technologies,'' Workshop on Metrology for Silicon Wafers for 100 nm Technology Generations and Beyond, SEMI/Europa, Munich, April 2002. ! talk-ppt ! talk-pdf
B. Lee, D. Boning, W. Baylies, N. Poduje, and J. Valley, ``Modeling and Mapping of Nanotopography Interactions with CMP,'' Materials Research Society (MRS) Spring Meeting, San Francisco, CA, April 2002. | paper-pdf ! talk-ppt ! talk-pdf

2001

T. Tugbawa, T. Park, B. Lee, D. Boning. P. Lefevre, and J. Nguyen, ``Modeling of Pattern Dependencies in Abrasive-Free Copper Chemical Mechanical Polishing Processes,'' VLSI Multilevel Interconnect Conference, Santa Clara, CA, November 2001. | pdf | talk-pdf
T. Park, T. Tugbawa, D. Boning, C. Borst, G. Shinn, and P.R. Chidambaram, ``Instantaneous Removal Rate in Copper CMP,'' Chemical Mechanical Polishing 2001, American Vacuum Society, San Jose, October 2001. | talk-pdf
D. Boning, B. Lee, T. Tubawa, and T. Park, ``Modeling the Effect of Non-Prestonian Pressure on Pattern Dependencies in CMP,'' 6th International Symposium on CMP, Lake Placid, NY, August 2001. | talk-pdf
D. Boning, B. Lee, T. Tubawa, and T. Park, ``Models for Pattern Dependencies: Capturing Effects in Oxide, STI, and Copper CMP,'' Semicon/West Technical Symposium: CMP Technology for ULSI Manufacturing,, San Francisco, CA, July 2001. | talk-pdf
K. H. Chen, D. S. Boning, and R. E. Welsch, ``Multivariate Statistical Process Control and Signature Analysis Using Eigenfactor Detection Methods,'' The 33rd Symposium on the Interface of Computer Science and Statistics, Costa Mesa, CA, June 2001. | pdf
T. H. Park, T. E. Tubgawa, and D. S. Boning, ``Pattern Dependent Modeling of Electroplated Copper Profiles,'' International Interconnect Technology Conference (IITC), pp. 274-276, San Francisco, CA, June 2001. | paper-pdf | talk-pdf
V. Mehrotra and D. Boning, ``Technology Scaling Impact of Variation on Clock Skew and Interconnect Delay,'' International Interconnect Technology Conference (IITC), pp. 122-124, San Francisco, CA, June 2001. | paper-pdf | talk-pdf
S. L. Sam, A. Chandrakasan, and D. Boning, ``Variation Issues in On-Chip Optical Clock Distribution,'' Sixth International Workshop on Statistical Methodologies for IC Processes, Devices, and Circuits (IWSM), Kyoto, Japan, June 2001. | paper-pdf | talk-ppt | talk-pdf
T. Tugbawa, T. Park, B. Lee, D. Boning, P. Lefevre, and L. Camilletti, ``Modeling of Pattern Dependencies for Multi-Level Copper Chemical-Mechanical Polishing Processes,'' Materials Research Society (MRS) Spring Meeting, San Francisco, CA, April 2001. | paper-pdf | talk-pdf
P. Lefevre, A. Gonzales, T. Brown, G. Martin, T. Tugbawa, T. Park, B. Lee, D. Boning, M. Gostein, and J. Nguyen, ``Direct Measurement of Planarization Length for Copper Chemica -Mechanical Planarization Polishing (CMP) Processes Using a Large Pattern Test Mask,'' Materials Research Society (MRS) Spring Meeting, San Francisco, CA, April 2001. | paper-pdf | talk-ppt | talk-pdf
B. Lee, D. Boning, W. Baylies, N. Poduje, P. Hester, Y. Xia, J. Valley, C. Koliopoulus, D. Hetherington, H. Sun, M. Lacy, ``Wafer Nanotopography Effects on CMP: Experimental Validation of Modeling Methods,'' Materials Research Society (MRS) Spring Meeting, San Francisco, CA, April 2001. | paper-pdf | talk-pdf
T. Gan, T. Tugbawa, B. Lee, D. S. Boning, and S. Jang, ``Modeling of Reverse Tone Etchback Shallow Trench Isolation Chemical Mechanical Polishing,'' J. Electrochem. Soc.,, vol. 148, no. 3, pp. G159-G165, March 2001. | pdf
B. Lee, D. Boning, L. Economikos, ``A Fixed Abrasive CMP Model,'' Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC 2001), pp. 395-402, Santa Clara, March 2001. | paper-pdf | talk-pdf
T. Tugbawa, T. Park, D. Boning, L. Camilletti, M. Brongo, and P. Lefevre, ``Modeling of Pattern Dependencies in Multi-Step Copper Chemical Mechanical Polishing Processes,'' Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC 2001), pp. 65-68, Santa Clara, March 2001. | pdf

2000

D. Boning, B. Lee, W. Baylies, N. Poduje, P. Hester, J. Valley, C. Koliopoulos and D. Hetherington, ``Characterization and Modeling of Nanotopography Effects on CMP,'' International CMP Symposium 2000, Tokyo, Japan, Dec. 4, 2000. | talk-pdf
C. Oji, B. Lee, D. Ouma, T. Smith, J. Yoon, J. Chung, and D. Boning, ``Wafer Scale Variation of Planarization Length in Chemical Mechanical Polishing,'' J. Electrochem. Soc.,, vol. 147, no. 11, pp. 4307-4312, Nov. 2000. | pdf
B. Maag, B. Voelker, and D. Boning, ``Assessing the Environmental Impact of Copper CMP,'' Semiconductor International, Oct. 2000. | html
B. Lee, T. Gan, D. Boning, P. Hester, N. Poduje, and W. Baylies, ``Nanotopography Effects on Chemical Mechanical Polishing for Shallow Trench Isolation,'' Advanced Semiconductor Manufacturing Conference, p. 425, Boston, MA, Sept. 2000. | paper-postscript | paper-pdf | talk-postscript | talk-pdf
T. Tugbawa, T. Park, and D. Boning, ``Framework for Modeling of Pattern Dependencies in Multi-Step Cu CMP Processes,'' SEMICON West 2000, July 2000. | pdf
V. Mehrotra, S. L. Sam, D. Boning, A. Chandrakasan, R. Valishayee, and S. Nassif, ``A Methodology for Modeling the Effects of Systematic Within-Die Interconnect and Device Variation on Circuit Performance,'' Design Automation Conference, June 2000. | pdf
B. Lee, T. Gan, D. Boning, J. David, B. A. Bonner, P. McKeever, T. H. Osterheld, ``Using Wafer-Scale Patterns for CMP Analysis,'' Materials Research Society (MRS) Spring Meeting, San Francisco, CA, April 2000. | paper-pdf | talk-pdf
T. Park, T. Tugbawa, and D. Boning, ``An Overview of Methods for Characterization of Pattern Dependencies in Copper CMP,'' Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC 2000), pp. 196-205, Santa Clara, March 2000. | paper-pdf | talk-pdf
D. White, D. Boning and A. Gower, ``Characterization of Endpoint and Wafer Level Non-Uniformity using In-situ Thermography,'' Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC 2000), pp. 229-236, Santa Clara, March 2000. | paper-pdf | talk-pdf
B. Lee, D. S. Boning, D. L. Hetherington, and D. J. Stein, ``Using Smart Dummy Fill and Selective Reverse Etchback for Pattern Density Equalization,'' Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC 2000), pp. 255-258, Santa Clara, March 2000. | paper-pdf | poster-pdf
D. Boning and S. Nassif, ``Models of Process Variations in Device and Interconnect,'' in Design of High Performance Microprocessor Circuits, Eds. A. Chandrakasan, W. Bowhill and F. Fox, IEEE Press, 2000. pdf. Extended version: pdf

1999

T. H. Smith, B. E. Goodlin, D. S. Boning, and H. H. Sawin, ``A statistical analysis of single and multiple response surface modeling,'' IEEE Trans. Semi. Manuf., vol. 12, no. 4, pp. 419-430, Nov. 1999. | pdf
T. Park, T. Tugbawa, D. Boning, S. Hymes, T. Brown, K. Smekalin, and G. Schwartz, ``Multi-Level Pattern Effects in Copper CMP,'' CMP Symposium, Electrochemical Society Meeting, Vol. PV99-37, pp. 94-100, Honolulu, HA, Oct. 1999. | paper-pdf | talk-pdf
T. Tugbawa, T. Park, D. Boning, T. Pan, P. Li, S. Hymes, T. Brown, and L. Camilletti, ``A Mathematical Model of Pattern Dependencies in Cu CMP Processes,'' CMP Symposium, Electrochemical Society Meeting, Vol. PV99-37, pp. 605-615, Honolulu, HA, Oct. 1999. | paper-postscript | paper-pdf | talk-postscript | talk-pdf
S. Hymes, T. Brown, P. LeFevre, B. Mikkola, I. Emesh, R. Bajaj, K. Smekalin, Y. Ma, F. Redeker, T. Park, T. Tugbawa, D. Boning, and J. Nguyen, ``Evolution of Topography During First Step CMP of Cu-Plated Damascene Structures,'' CMP Symposium, Electrochemical Society Meeting, Vol. PV99-37, pp. 149-157, Honolulu, HA, Oct. 1999. | pdf
T. Smith, S. J. Fang, J. A. Stefani, G. B. Shinn, D. S. Boning, and S. W. Butler, "On-line Patterned Wafer Thickness Control of Chemical-Mechanical Polishing," J. Vac. Sci. and Tech. A, vol. 17, no. 4, pp. 1384-1390, July/Aug. 1999. | pdf
D. Boning, ``Characterization Methods and Metrics for Patterned Wafer CMP,'' SEMI CMP Standards Meeting, SEMICON/WEST, San Francisco, CA, July 1999. | talk pdf
T. H. Smith, B.E. Goodlin, D. S. Boning, and H.H. Sawin, ``A study of within-wafer non-uniformity metrics,'' Fourth International Workshop on Statistical Metrology, Kyoto, Japan, June 1999. | pdf
D. Boning, B. Lee, C. Oji, D. Ouma, T. Park, T. Smith, and T. Tugbawa, ``Pattern Dependent Modeling for CMP Optimization and Control,'' Materials Research Society 1999 Spring Meeting, San Francisco, CA, April 1999. | pdf | talk-pdf
S. Hymes, K. Smekalin, T. Brown, H. Yeung, M. Joffe, M. Banet, T. Park, T. Tugbawa, D. Boning, J. Nguyen, T. West, and W. Sands, ``Determination of the Planarization Distance for Copper CMP Process,'' Materials Research Society 1999 Spring Meeting, San Francisco, CA, April 1999. | pdf
Taber H. Smith, Simon J. Fang, Duane S. Boning, Greg B. Shinn, and Jerry A. Stefani, ``A CMP Model Combining Density and Time Dependencies,'' 1999 Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC), Santa Clara, Feb. 1999. | postscript | pdf
T. Park, T. Tugbawa, D. Boning, J. Chung, S. Hymes, R. Muralidhar, B. Wilks, K. Smekalin, and G. Bersuker, ``Electrical Characterization of Copper Chemical Mechanical Polishing,'' 1999 Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC), Santa Clara, Feb. 1999. | postscript | pdf
S. J. Fang, T. H. Smith, G. B. Shinn, J. A. Stefani and D. S. Boning, ``Advanced Process Control in Dielectric Chemical Mechanical Polishing (CMP),'' 1999 Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC), Santa Clara, Feb. 1999. | postscript | pdf
J. Tony Pan, Ping Li, Kapila Wijekoon, Stan Tsai, Fritz Redeker, Tae Park, Tamba Tugbawa, and Duane Boning, ``Copper CMP and Process Control,'' 1999 Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC), Santa Clara, Feb. 1999. | pdf
D. S. Boning, J. Stefani, and S. W. Butler, ``Statistical Methods in Semiconductor Manufacturing,'' in Encyclopedia of Electrical Engineering, J.G. Webster, Ed., Wiley, 1999. | pdf

1998

V. Mehrotra, S. Nassif, D. Boning, and J. Chung, ``Modeling the Effects of Manufacturing Variation on High-Speed Microprocessor Interconnect Performance,'' 1998 International Electron Devices Meeting, San Francisco. CA, Dec. 1998. | postscript | pdf
T. H. Smith, S. J. Fang, J. A. Stefani, G. B. Shinn, D. S. Boning, S. W. Butler, ``NOVA In-Line CMP Metrology and Its Use for Lot-to-Lot Process Control,'' 45th National Symposium of the American Vacuum Society, Baltimore, MD, Nov. 1998. | pdf
A. Nishimoto, T. Smith, D. Ouma, E. Stuckey, and D. Boning, ``An In-Situ Sensor for Reduced Consumable Usage Through Control in CMP,'' Extended Abstracts, TechCon'98, Semiconductor Research Corporation, Las Vegas, NV, Sept. 1998. | postscript | pdf
D. Ouma, D. Boning, J. Chung, G. Shinn, L. Olsen, and J. Clark, ``An Integrated Characterization and Modeling Methodology for CMP Dielectric Planarization,'' International Interconnect Technology Conference, pp. 67-69, San Francisco, CA, June 1998. | postscript | pdf
T. Park, T. Tugbawa, J. Yoon, D. Boning, J. Chung, R. Muralidhar, S. Hymes, Y. Gotkis, S. Alamgir, R. Walesa, L. Shumway, G. Wu, F. Zhang, R. Kistler, J. Hawkins, ``Pattern and Process Dependencies in Copper Damascene Chemical Mechanical Polishing Processes,'' VLSI Multilevel Interconnect Conference, Santa Clara, CA, June 1998. | postscript | pdf
Pan, J. T., D. Ouma, P. Li, D. Boning, F. Redecker, J. Chung, and J. Whitby, ``Planarization and Integration of Shallow Trench Isolation,'' VLSI Multilevel Interconnect Conference, pp. 467-472, Santa Clara, CA, June 1998. | postscript | pdf
T. H. Smith, B.E. Goodlin, D. S. Boning, C.O. Oji, J.E. Chung, and H.H. Sawin, ``Bias and Variance in Single and Multiple Response Surface Modeling,'' Third International Workshop on Statistical Metrology, Honolulu, HI, June 1998. | postscript | pdf
D. Boning, D. Ouma and J. Chung, ``Extraction of Planarization Length and Response Function in Chemical-Mechanical Polishing,'' Symposium Q: Materials Issues in Chemical-Mechanical Polishing, Materials Research Society Spring Meeting, San Francisco, CA, April 1998. | talk-postscript | talk-pdf
D. Boning and J. Chung, ``Statistical Metrology - Measurement and Modeling of Variation for Advanced Process Development and Design Rule Generation,'' 1998 Int. Conference on Characterization and Metrology for ULSI Technology, Gaithersburg, MD, March 1998. | postscript | pdf | talk-pdf | talk-postscript
D. Ouma, C. Oji, D. Boning, J. Chung, D. Hetherington, and P. Merkle, ``Effect of High Relative Speed on Planarization Length in Oxide Chemical Mechanical Polishing,'' 1998 Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC), Santa Clara, Feb. 1998. | postscript | talk-postscript
Addendum: In more recent experiments by Achuthan et al., the critical importance of the subpad (or lack of subpad) has become much clearer. This is noted in the presentation foils. We urge readers to use the data in the CMP-MIC paper with caution: The data (with careful attention to the conditions reported) are valid; however, both speed and underlying pad type were changed in unison confounding the planarization results, so that the reader should not conclude that speed is the critical influential parameter.
B. Stine, D. Ouma, R. Divecha, D. Boning, J. Chung, ''Rapid Characterization and Modeling of Pattern Dependent Variation in Chemical Mechanical Polishing,'' IEEE Trans. Semi. Manuf., vol. 11, no. 1, pp. 129-140, Feb. 1998. | pdf

1997

B. E. Stine, V. Mehrotra, D. S. Boning, J. E. Chung, and D. J. Ciplickas, ``A Methodology for Assessing the Impact of Spatial/Pattern Dependent Interconnect Parameter Variation on Circuit Performance,'' 1997 International Electron Devices Meeting, pp. 133-136, Wash. DC, Dec. 1997. | postscript | pdf
A. Maury, D. Ouma, D. Boning, and J. Chung, ``A Modification to Preston's Equation and Impact on Pattern Density Effect Modeling,'' Advanced Metalization Conference, San Diego, CA, Oct. 1997. | postscript | pdf
O. S. Nakagawa, S.-Y. Oh, F. Eschbach, G. Ray, P. Nikkel, R. R. Divecha, B. E. Stine, D. O. Ouma, D. S. Boning, and J. E. Chung, ``Modeling of CMP-Induced Pattern-Dependent ILD Thickness Variation in Multilevel Metallization Systems,'' Advanced Metalization Conference, San Diego, CA, Oct. 1997.
D. Ouma, B. Stine, R. Divecha, D. Boning, J. Chung, G. Shinn, I. Ali, and J. Clark, ``Wafer-Scale Modeling of Pattern Efect in Oxide Chemical Mechanical Polishing,'' Manufacturing Yield, Reliability, and Failure Analysis session, SPIE 1997 Symposium on Microelectronic Manufacturing, Austin TX, Oct. 1997. | postscript | pdf
N. M. Muthukrishnan, S. Prasad, B. E. Stine, W. Loh, R. Nagahara, J. E. Chung, D. S. Boning, ``Evaluation of pad life in chemical mechanical polishing process using statistical metrology,'' Manufacturing Yield, Reliability, and Failure Analysis session, SPIE 1997 Symposium on Microelectronic Manufacturing, Austin TX, Oct. 1997.
B. E. Stine, D. S. Boning, J. E. Chung, D. Ciplickas, J. K. Kibarian, ``Simulating the Impact of Poly-CD Wafer-Level and Die-Level Variation On Circuit Performance,'' Second International Workshop on Statistical Metrology, Kyoto, Japan, June 1997. | postscript | pdf | talk-postscript | talk-pdf
B. E. Stine, D. S. Boning, and J. E. Chung, ``Rapid Characterization and Modeling of Spatial Variation: A CMP Case Study,'' KLA-Tencor Yield Management Seminar, CMP Metrology Session, Semicon West '97, July 1997. | postscript | slides postscript
D. Boning, J. Chung, D. Ouma, and R. Divecha, ``Spatial Variation in Semiconductor Processes: Modeling for Control,'' Electrochem. Society Meeting, Montreal, CA, May 1997. | postscript | pdf
B. E. Stine, D. S. Boning, J. E. Chung, L. Camilletti, F. Kruppa, E. R. Equi, W. Loh, S. Prasad, M. Muthukrishnan, D. Towery, M. Berman, and A. Kapoor, ``The Physical and Electrical Effects of Metal Fill Patterning Practices for Oxide Chemical Mechanical Polishing Processes,'' IEEE Trans. on Electron Devices, Vol. 45, No. 3, pp. 665-679, March 1998. | pdf
Stine, B., D. Ouma, R. Divecha, D. Boning, J. Chung, D. Hetherington, I. Ali, G. Shinn, J. Clark, O. Nakagawa, S-Y Oh., ''A Closed-Form Analytic Model for ILD Thickness Variation in CMP Processes,'' 1997 Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC), p. 266, Santa Clara, February, 1997. | postscript | pdf
Divecha, R., B. Stine, D. Ouma, J. Yoon, D. Boning, J. Chung, O.S. Nakagawa, S-Y Oh, ``Effect of Fine-Line Density and Pitch on Interconnect ILD Thickness Variation in Oxide CMP Processes,'' 1997 Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC), p. 29, Santa Clara, February, 1997. | text-postscript | figures-postscript
Stine, B., D. Boning, and J. Chung, ``Analysis and Decomposition of Spatial Variation in Integrated Circuit Processes and Devices,'' IEEE Trans. Semi. Manuf., February 1997. | pdf

1996

Boning, D., and J. Chung, ``Statistical Metrology: Tools for Understanding Variation,'' Future Fab Int'l., December, 1996. | postscript | pdf
Boning, D., and J. Chung, ``Statistical Metrology: Understanding Spatial Variation in Semiconductor Manufacturing,'' Manufacturing Yield, Reliability, and Failure Analysis session, SPIE 1996 Symposium on Microelectronic Manufacturing, Austin TX, Oct. 1996. | postscript | pdf
Stine, B., D. Boning, J. Chung, D. Bell, and E. Equi, ``Inter- and Intra-die Polysilicon Critical Dimension Variation,'' Manufacturing Yield, Reliability, and Failure Analysis session, SPIE 1996 Symposium on Microelectronic Manufacturing, SPIE Vol. 2874, Austin TX, Oct. 1996. | postscript | pdf
Ouma, D., B. Stine, R. Divecha, D. Boning, J. Chung, I. Ali, and M. Islamraja,, ``Using Variation Decomposition Analysis to Determine the Effect of Process on Wafer and Die-Level Uniformities in CMP,'' First International Symposium on Chemical Mechanical Planarization (CMP) in IC Device Manufacturing, Vol. 96-22, pp. 164-175, 190th Electrochemical Society Meeting, San Antonio, TX, Oct. 6-11, 1996. | postscript | pdf
Prasad, S., W. Loh, A. Kapoor, E. Chang, B. Stine, D. Boning, and J. Chung, ``Statistical Metrology for Characterizing CMP Processes,'' European Materials Research Society Spring Meeting, Strasbourg, France, June 4-7, 1996.
Divecha, R. R., B. E. Stine, D. O. Ouma, D. Boning, J. Chung, O. S. Nakagawa, S.-Y. Oh, and D. L. Hetherington, ``Comparison of Oxide Planarization Pattern Dependencies between Two Different CMP Tools Using Statistical Metrology,'' VLSI Multilevel Interconnect Conference, pp. 427-430, Santa Clara, CA, June 1996. | postscript | pdf
Stine, B., D. Boning, J. Chung, L. Camilletti, E. Equi, S. Prasad, W. Loh, and A. Kapoor, ``The Role of Dummy Fill Patterning Practices on Intra-Die ILD Thickness Variation in CMP Processes,'' VLSI Multilevel Interconnect Conference, pp. 421-423, Santa Clara, CA, June 1996. | postscript | pdf
Divecha, R. R., B. E. Stine, E. C. Chang, D. O. Ouma, D. S. Boning, J. E. Chung, O. S. Nakagawa, S.-Y. Oh, S. Prasad, W. Loh, and A. Kapoor, ``Assessing and Characterizing Inter- and Intra-die Variation Using a Statistical Metrology Framework: A CMP Case Study,'' First International Workshop on Statistical Metrology, pp. 9-12, Honolulu, HI, June 1996. | text-postscript | figures-postscript

1995

Chang, E, B. Stine, T. Maung, R. Divecha, D. Boning, J. Chung, K. Chang, G. Ray, D. Bradbury, S. Oh, and D. Bartelink, ``Using a Statistical Metrology Framework to Identify Random and Systematic Sources of Intra-Die ILD Thickness Variation for CMP Processes,'' 1995 International Electron Devices Meeting, pp. 499-502, Wash. D.C., Dec. 1995. | (text postscript) | (text pdf) | (figures postscript) | (figures pdf)
Yu, C., T. Maung, C. Spanos, D. Boning, J. Chung, H.-Y. Liu, K.-J. Chang, and D. Bartelink, ``Use of Short-Loop Electrical Measurements for Yield Improvement,'' IEEE Trans. Semi. Manuf., pp. 150-159, May 1995.

1994

Boning, D. S., T. Maung, J. Chung, K.-J. Chang, S.-Y. Oh, and D. Bartelink, ``Statistical metrology of interlevel dielectric thickness variation,'' Proceedings of the SPIE Symposium on Microelectronics Manufacturing, SPIE Vol. 2334, pp. 316-327, Austin, TX, Oct. 1994. | postscript | pdf

Publications - MIT Statistical Metrology

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Copyright © 1996-2002 by Massachusetts Institute of Technology. All rights reserved.