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Conference Papers and Presentations

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2014

  • Tikekar, M., C.-T. Huang, V. Sze, A. Chandrakasan, "Energy and Area-Efficient Hardware Implementation of HEVC Inverse Transform and Dequantization," IEEE Interational Conference on Image Processing, Oct. 2014.
  • Biswas, A., Y. Sinangil, A. P. Chandrakasan, "A 28nm FDSOI integrated reconfigurable switched-capacitor based step-up DC-DC converter with 88% peak efficiency," European Solid State Circuits Conference (ESSCIRC), 22-26 Sept. 2014. [link]
  • Angelopoulos, G., A. P. Chandrakasan, M. Medard, "Energy Savings via Harnessing Partial Packets in Body Area Networks," International Conference on Body Area Networks (BodyNets), Oct. 2014.
  • Angelopoulos, G., A. P. Chandrakasan, M. Medard, "PRAC: Exploiting Partial Packets Without Cross-layer or Feedback Information," IEEE International Conference on Communications (ICC), June 2014. [link]
  • Daya, B. K., C.-H. O. Chen, S. Subramanian, Woo-Cheol Kwon, Sunghyun Park, T. Krishna, J. Holt, A. P. Chandrakasan, Li-Shiuan Peh, "SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering," International Symposium on Computer Architecture (ISCA), June 2014. [link]
  • Yaul, F. M., A. P. Chandrakasan, "A 10b 0.6nW SAR ADC with Data-Dependent Energy Savings Using LSB-First Successive Approximation," IEEE International Solid State Circuits Conference (ISSCC), Feb 2014. [link]
  • Yip, M., R. Jin, H. H. Nakajima, K. M. Stankovic, A. P. Chandrakasan, "A Fully-Implantable Cochlear Implant SoC with Piezoelectric Middle-Ear Sensor and Energy-Efficient Stimulation in 0.18µm HVCMOS," IEEE International Solid State Circuits Conference (ISSCC), Feb 2014. [link]
  • Lee, S., A. P. Chandrakasan, H-S. Lee, "A 1GS/s 10b 18.9mW Time-Interleaved SAR ADC with Background Timing-Skew Calibration," IEEE International Solid State Circuits Conference (ISSCC), Feb 2014. [link]
  • Bandyopadhyay, S., P. P. Mercier, A. C. Lysaght, K. M. Stankovic, A. P. Chandrakasan, "A 1.1nW Energy Harvesting System with 544pW Quiescent Power for Next-Generation Implants," IEEE International Solid State Circuits Conference (ISSCC), Feb 2014. [link]
  • Price, M., J. Glass, A. P. Chandrakasan, "A 6mW 5K-Word Real-Time Speech Recognizer Using WFST Models," IEEE International Solid State Circuits Conference (ISSCC), Feb 2014. [link]
  • Abari, O., E. Hamed, H. Hassanieh, A. Agarwal, D. Katabi, A. P. Chandrakasan, V. Stojanovic, "A 0.75-Million-Point Fourier-Transform Chip for Frequency-Sparse Signals," IEEE International Solid State Circuits Conference (ISSCC), Feb 2014. [link]

2013

  • Huang, C.-T., C. Juvekar, M. Tikekar, A. P. Chandrakasan, "HEVC interpolation filter architecture for quad full HD decoding," Visual Communications and Image Processing (VCIP), Nov. 2013. [link]
  • Mercier, P. P., S. Bandyopadhyay, A. P. Chandrakasan, "Enabling Sub-nW RF circuits through subthreshold leakage management," SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Oct. 2013. [link]
  • Mercier, P. P., S. Bandyopadhyay, A. C. Lysaght, K. M. Stankovic, A. P. Chandrakasan, "A 78 pW 1 b/s 2.4 GHz radio transmitter for near-zero-power sensing applications," European Solid State Circuits Conference (ESSCIRC), Sept. 2013. [link]
  • Angelopoulos, G., A. Paidimarri, A. P. Chandrakasan, M. Medard, "Experimental Study of the Interplay of Channel and Network Coding in Low Power Sensor Applications," IEEE International Conference on Communications (ICC), Jun 2013. [link]
  • Chen, C.-H., S. Park, T. Krishna, S. Subramanian, A. Chandrakasan, L.-S. Peh, "SMART: A Single-Cycle Reconfigurable NoC for SoC Applications," In Proceedings of Design Automation and Test in Europe (DATE), Grenoble, France, March 2013. [link]
  • Park, S., M. Qazi, L.-S. Peh, A. Chandrakasan, "40.4fJ/bit/mm Low-Swing On-Chip Signaling with Self-Resetting Logic Repeaters embedded within a mesh NoC in 45nm SOI CMOS," In Proceedings of Design Automation and Test in Europe (DATE), Grenoble, France, March 2013. [link]
  • Huang, C.-T., M. Tikekar, C. Juvekar, V. Sze, A. Chandrakasan, "A 249Mpixel/s HEVC Video-Decoder Chip for Quad Full HD Applications," IEEE International Solid State Circuits Conference (ISSCC), pp. 162-163, Feb 2013. [link]
  • Rithe, R., P. Raina, N. Ickes, S. V. Tenneti, A. P. Chandrakasan, "Reconfigurable Processor for Energy-Scalable Computational Photography," IEEE International Solid State Circuits Conference (ISSCC), pp. 164-165, Feb 2013. [link]
  • Paidimarri, A., D. Griffith, A. Wang, A. P. Chandrakasan, G. Burra, "A 120nW 18.5kHz RC Oscillator with Comparator Offset Cancellation for ±0.25% Temperature Stability," IEEE International Solid State Circuits Conference (ISSCC), pp. 184-185, Feb 2013. [link]
  • Qazi, M., A. Amerasekera, A. P. Chandrakasan, "A 3.4pJ FeRAM-Enabled D Flip-Flop in 0.13µm CMOS for Nonvolatile Processing in Digital Systems," IEEE International Solid State Circuits Conference (ISSCC), pp. 192-193, Feb 2013. [link]
  • Desai, N. V., J. Yoo, A. P. Chandrakasan, "A Scalable 2.9mW 1Mb/s eTextiles Body Area Network Transceiver with Remotely Powered Sensors and Bi-Directional Data Communication," IEEE International Solid State Circuits Conference (ISSCC), pp. 206-207, Feb 2013. [link]
  • Sinangil, M. E., A. P. Chandrakasan, "An SRAM Using Output Prediction to Reduce BL-Switching Activity and Statistically-Gated SA for up to 1.9× Reduction in Energy/Access," IEEE International Solid State Circuits Conference (ISSCC), pp. 318-319, Feb 2013. [link]
  • Bandyopadhyay, S., B. Neidorff, D. Freeman, A. P. Chandrakasan, "90.6% Efficient 11MHz 22W LED Driver Using GaN FETs and Burst-Mode Controller with 0.96 Power Factor," IEEE International Solid State Circuits Conference (ISSCC), pp. 368-369, Feb 2013. [link]
  • El-Damak, D., S. Bandyopadhyay, A. Chandrakasan, "A 93% Efficiency Reconfigurable Switched-Capacitor DC-DC Converter Using On-Chip Ferroelectric Capacitors," IEEE International Solid State Circuits Conference (ISSCC), pp. 374-375, Feb 2013. [link]

2012

  • Sinangil, Y., A. P. Chandrakasan, "An Embedded Energy Monitoring Circuit for a 128kbit SRAM with Body-biased Sense-Amplifiers," IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 69-72, Nov. 2012. [link]
  • Chen, K., A. Chandrakasan, C. Sodini, "Ultrasonic Imaging Front-End Design for CMUT: A 3-Level 30Vpp Pulse-Shaping Pulser with Improved Efficiency and a Noise-Optimized Receiver," Asian Solid-State Circuits Conference, IEEE, Nov. 2012.
  • Chen, K., B. Lam, C. Sodini, A. Chandrakasan, "System Energy Model for a Digital Ultrasound Beamformer with Image Quality Control," IEEE Ultrasonics Symposium, Oct. 2012.
  • Ha, S., M. Diez-Silva, E Du, S. J. Kim, J. Han, M. Dao, and A. P. Chandrakasan, "Microfluidic Electric Impedance Spectroscopy for Malaria Diagnosis", International Conference on Miniaturized Systems for Chemistry and Life Sciences (μTAS), pp. 1960-1962, Oct. 2012.
  • Sinangil, M. E., V. Sze, M. Zhou, A. P. Chandrakasan, "Hardware-Aware Motion Estimation Search Algorithm Development for High-Efficiency Video Coding (HEVC) Standard," IEEE International Conference on Image Processing (ICIP), pp. 1529-1532, Sep. 2012.[link]
  • Sinangil, M. E., V. Sze, M. Zhou, A. P. Chandrakasan, "Memory Cost vs. Coding Efficiency Trade-Offs for HEVC Motion Estimation Engine," IEEE International Conference on Image Processing (ICIP), pp. 1533-1536, Sep. 2012.[link]
  • Hoffmann, H., J. Holt, G. Kurian, E. Lau, M. Maggio, J. E. Miller, S. M. Neuman, M. Sinangil, Y. Sinangil, A. Agarwal, A. P. Chandrakasan, S. Devadas, "Self-aware Computing in the Angstrom Processor", Design Automation Conference (DAC), June 2012. [link]
  • Park, S., T. Krishna, C.-H. O. Chen, B. Daya, A. P. Chandrakasan, L.-S. Peh, "Approaching the Theoretical Limits of a Mesh NoC with a 16-Node Chip Prototype in 45nm SOI", Design Automation Conference (DAC), June 2012. [link]
  • Nadeau, P., A. Paidimarri, P. Mercier, A. Chandrakasan, "Multi-channel 180pJ/bit 2.4GHz FBAR-based Receiver," IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp. 381-384, June 2012. [link]
  • Paidimarri, A., P. Nadeau, P. Mercier, A. Chandrakasan, "A 440pJ/bit 1Mb/s 2.4GHz Multi-Channel FBAR-based TX and an Integrated Pulse-shaping PA," IEEE Symposium on VLSI Circuits (VLSIC), pp.34-35, June 2012. [link]
  • Yip, M., J.L. Bohorquez, and A. P. Chandrakasan, "A 0.6V 2.9μW Mixed-Signal Front-End for ECG Monitoring," IEEE Symposium on VLSI Circuits (VLSIC), pp. 66-67, June 2012. [link]
  • Kadirvel, K., Y. Ramadass, U. Lyles, J. Carpenter, V. Ivanov, V. McNeil, A. Chandrakasan, B. Lum-Shue-Chan, "A 330nA Energy-Harvesting Charger with Battery Management for Solar and Thermoelectric Energy Harvesting," IEEE International Solid-State Circuits Conference (ISSCC), Feb 2012. [link]
  • Yoo, J., L. Yan, D. El-Damak, M. Bin Altaf, A. Shoeb, H-J. Yoo, A. Chandrakasan, "An 8-Channel Scalable EEG Acquisition SoC With Fully Integrated Patient-Specific Seizure Classification and Recording Processor," IEEE International Solid-State Circuits Conference (ISSCC), Feb 2012. [link]

2011

  • Rithe, R., C. C. Cheng, A. Chandrakasan, "Quad Full-HD Transform Engine for Dual-Standard Low-Power Video Coding," IEEE Asian Solid-State Circuits Conference (A-SSCC), 401-404, November 2011. [link]
  • Ickes, N., Y. Sinangil, F. Pappalardo, E. Guidetti, A. P. Chandrakasan, "A 10 pJ/cycle ultra-low-voltage 32-bit microprocessor system-on-chip," ESSCIRC (ESSCIRC), 2011 Proceedings of the, vol., no., pp.159-162, 12-16 Sept. 2011. [link]
  • Lee, S., A. P. Chandrakasan, H.-S. Lee, "A 12b 5-to-50MS/s 0.5-to-1V voltage scalable zero-crossing based pipelined ADC," ESSCIRC (ESSCIRC), 2011 Proceedings of the, vol., no., pp.355-358, 12-16 Sept. 2011 [link]
  • Bandyopadhyay S., A. P. Chandrakasan, "Platform Architecture for Solar, Thermal and Vibration Energy combining with MPPT and single inductor," IEEE Symposium on VLSI Circuits (VLSIC), pp. 238-239, June 2011. [link]
  • Angelopoulos, G., M. Medard, A. Chandrakasan, "Energy-Aware Hardware Implementation of Network Coding", IFIP TC 6th International Conference on Networking, May 2011. [pdf]
  • Sze, V., A. P. Chandrakasan, "Joint algorithm-Architecture Optimization of CABAC to Increase Speed and Reduce Area Cost," IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), pp. 1577-1580, May 2011. [link]
  • Sze, V., A. Chandrakasan, "A Highly Parallel and Scalable CABAC Decoder for Next Generation Video Coding," IEEE International Solid-State Circuits Conference (ISSCC), pp. 126-127, Feb 2011. [link]
  • Gammie, G., N. Ickes, M. Sinangil, R. Rithe, J. Gu, A. Wang, H. Mair, S. Datla, B. Rong, S. Honnavara-Prasad, L. Ho, G. Baldwin, D. Buss, A. Chandrakasan, U. Ko, "A 28nm 0.6V Low-Power DSP for Mobile Applications," IEEE International Solid-State Circuits Conference (ISSCC), pp. 132-133, Feb 2011. [link]
  • Yip, M., A. Chandrakasan, "A Resolution-Reconfigurable 5-to-10b 0.4V-to-1V Power Scalable SAR ADC," IEEE International Solid-State Circuits Conference (ISSCC), pp. 190-191, Feb 2011. [link, slides]
  • Qazi, M., M. Clinton, S. Bartling, A. Chandrakasan, "A Low-Voltage 1Mb FeRAM in 0.13μm CMOS Featuring Time-to-Digital Sensing for Expanded Operating Margin in Scaled CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 208-209, Feb 2011. [link, slides]
  • Sinangil, M., H. Mair, A. Chandrakasan, "A 28nm High-Density 6T SRAM wth Optimized Peripheral-Assst Circuits for Operation Down to 0.6V," IEEE International Solid-State Circuits Conference (ISSCC), pp. 260-261, Feb 2011. [link, slides]
  • Bandyopadhyay S., Y. K. Ramadass, A. Chandrakasan, "20μA to 100mA DC-DC Converter with 2.8 to 4.2V Battery Supply for Portable Applications in 45nm CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 386-387, Feb 2011. [link]
  • Rithe, R., S. Chou, J. Gu, A. Wang, S. Datla, G. Gammie, D. Buss, A. Chandrakasan, "Cell Library Characterization at Low Voltage using Non-linear Operating Point Analysis of Local Variations," International Conference on VLSI Design, Jan 2011. [link, slides]

2010

  • Lajevardi, P., A. Chandrakasan, H.-S. Lee, "Zero-Crossing Detector Based Reconfigurable Analog System," IEEE Asian Solid-State Circuits Conference, pp. 257-260, Nov. 2010. [pdf]
  • Kwong, J., A. Chandrakasan, "An Energy-Efficient Biomedical Signal Processing Platform," IEEE European Solid-State Circuits Conference, pp. 526-529, Sept 2010. [pdf]
  • Chen, F., A. Chandrakasan, V. Stojanovic, "A Signal-agnostic Compressed Sensing Acquisition System for Wireless and Implantable Sensors," IEEE Custom Integrated Circuits Conference, pp. 1-4, Sept 2010. [pdf]
  • Chen, F., A. Chandrakasan, V. Stojanovic, "A Low-power Area-efficient Switching Scheme for Charge-sharing DACs in SAR ADCs," IEEE Custom Integrated Circuits Conference, Sept 2010. [pdf]
  • Cheng, C. -C., Y. -M. Tsai, L. -G. Chen, A. P. Chandrakasan, "A 0.077 to 1.168 nJ/bit/iteration Scalable 3GPP LTE Turbo Decoder with an Adaptive Sub-Block Parallel Scheme and an Embedded DVFS Engine," IEEE Custom Integrated Circuits Conference, Sept 2010. [pdf]
  • Bohorquez, J. L., M. Yip, A. P. Chandrakasan, J. L. Dawson, "A Digitally-Assisted Sensor Interface for Biomedical Applications," IEEE Symposium on VLSI Circuits (VLSIC), pp. 217-218, June 2010. [pdf]
  • Qazi, M., M. Tikekar, L. Dolecek, D. Shah, A. Chandrakasan, "Loop Flattening & Spherical Sampling: Highly Efficient Model Reduction Techniques for SRAM Yield Analysis," Design, Automation and Test in Europe (DATE), pp. 801-806, March 2010. [pdf, slides]
  • Rithe, R., J. Gu, A. Wang, S. Datla, G. Gammie, D. Buss, A. Chandrakasan, "Non-Linear Operating Point Statistical Analysis for Local Variations in Logic Timing at Low Voltage," Design, Automation and Test in Europe (DATE), pp. 965-968, March 2010. [pdf, slides]
  • Qazi, M., K. Stawiasz, L. Chang, A. Chandrakasan, "A 512kb 8T SRAM Macro Operating Down to 0.57V with An AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45nm SOI CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 350-351, February 2010. [pdf, slides]
  • Mercier, P., A. Chandrakasan, "A 110μW 10Mb/s eTextiles Transceiver for Body Area Networks with Remote Batter Power," IEEE International Solid-State Circuits Conference (ISSCC), pp. 496-497, February 2010. [pdf, slides]
  • Ramadass, Y., A. Fayed, B. Haroun, A. Chandrakasan, "A 0.16mm2 Completely On-Chip Switched-Capacitor DC-DC Converter Using Digital Capacitance Modulation for LDO Replacement in 45nm CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 208-209, February 2010. [pdf, slides]
  • Ramadass, Y., A. Chandrakasan, "A Batteryless Thermoelectric Energy-Harvesting Interface Circuit with 35mV Startup Voltage," IEEE International Solid-State Circuits Conference (ISSCC), pp. 486-487, February 2010. [pdf, slides]

2009

  • Sinangil, M., E., N. Verma, A. P. Chandrakasan, "A 45nm 0.5V 8T Column-Interleaved SRAM with on-Chip Reference Selection Loop for Sense-Amplifier," IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 225-228, November 2009. [pdf]
  • Sze, V., A. P. Chandrakasan, "A High Throughput CABAC Algorithm Using Syntax Element Partitioning," IEEE International Conference on Image Processing (ICIP), pp 773-776, November 2009. [pdf, slides]
  • Chen, F., A. P. Chandrakasan, V. Stojanovic, "An Oscilloscope Array for High-Impedance Device Characterization," European Solid-Sate Circuits Conference, pp 112-115, September 2009. [pdf, slides]
  • Verma, N., A. Shoeb, J. V. Guttag, A. P. Chandrakasan, "A Micro-power EEG acquisition SoC with integrated seizure detection processor for continuous patient monitoring," Symposium on VLSI Circuits, pp 62-63, June 2009. [pdf, slides]
  • Mercier, P. P., D. C. Daly, A. P. Chandrakasan, "Energy Efficient Pulsed-UWB for Miniaturized Flying Vehicles," Presented at the CMOS Emerging Technologies Workshop, Feb. 2009.
  • Ramadass, Y. K. and A. P. Chandrakasan, "An Efficient Piezoelectric Energy-Harvesting Interface Circuit Using a Bias-Flip Rectifier and Shared Inductor," IEEE International Solid-State Circuits Conference (ISSCC), pp. 296-297, February 2009. [pdf]
  • Mercier, P. P., M. Bhardwaj, D. C. Daly, A. P. Chandrakasan, "A 0.55V 16Mb/s 1.6mW Non-Coherent IR-UWB Digital Baseband with +-1ns Synchronization Accuracy," IEEE International Solid-State Circuits Conference (ISSCC), pp. 252-253, February 2009. [pdf, slides]
  • Daly, D. C., P. P. Mercier, M. Bhardwaj, A. L. Stone, J. Voldman, R. B. Levine, J. G. Hildebrand, A. P. Chandrakasan, "A Pulsed UWB Receiver SoC for Insect Motion Control," IEEE International Solid-State Circuits Conference (ISSCC), pp. 200-201, February 2009. [pdf]

2008

  • Sinangil, M. E., N. Verma, and A. P. Chandrakasan, "A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz," European Solid-State Circuits Conference, pp. 282-285, September 2008. [pdf]
  • Dolecek, L., M. Qazi, D. Shah, and A. P. Chandrakasan, "Breaking the Simulation Barrier: SRAM Evaluation Through Norm Minimization,"IEEE/ACM International Conference on Computer-Aided Design, pp. 322-329, November 2008. [pdf, slides]
  • Finchelstein, D. F., V. Sze, M. E. Sinangil, Y. Koken, and A. P. Chandrakasan, "A Low-Power 0.7-V H.264 720p Video Decoder," IEEE Asian Solid-State Circuits Conference, pp. 173-176, November 2008. [pdf, slides]
  • Ickes, N., D. Finchelstein, and A. P. Chandrakasan, "A 10-pJ/instruction, 4-MIPS Micropower DSP for Sensor Applications", IEEE Asian Solid-State Circuits Conference, pp. 289-292, November 2008. [pdf]
  • Drego, N., A. P. Chandrakasan, and D. Boning, "An All-Digital, Highly-Scalable Architecture for Measurement of Spatial Variation in Digital Circuits," IEEE Asian Solid-State Circuits Conference, pp. 393-396, November 2008. [pdf, slides]
  • Sze, V., M. Budagavi, A. P. Chandrakasan, and M. Zhou, "Parallel CABAC for Low Power Video Coding", IEEE International Conference on Image Processing, October 2008. [pdf, poster]
  • Bohorquez, J. L., J. L. Dawson, A. P. Chandrakasan, "A 350uW CMOS MSK Transmitter and 400uW OOK Super-Regenerative Receiver for Medical Implant Communications," IEEE Symposium on VLSI Circuits, pp. 32-33, June 2008. [pdf, slides]
  • Chandrakasan, A. P., D. C. Daly, J. Kwong, Y. K. Ramadass, "Next Generation Micro-power Systems," IEEE Symposium on VLSI Circuits, pp. 2-5, June 2008. [pdf]
  • Ginsburg, B. P., A. P. Chandrakasan, "The Mixed Signal Optimum Energy Point: Voltage and Parallelism," ACM/IEEE Design Automation Conference, pp. 244-249, Anaheim, CA, June 2008. [pdf, slides]
  • Cho, T. S., K.-J. Lee, J. Kong, A. P. Chandrakasan, "The Design of a Low Power Carbon Nanotube Chemical Sensor System", ACM/IEEE Design Automation Conference, pp. 84-89, Anaheim, June 8-13, 2008. [pdf]
  • Mercier, P. P., D. C. Daly, A. P. Chandrakasan, "A 19pJ/pulse UWB Transmitter with Dual Capacitively-Coupled Digital Power Amplifiers," IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp. 47-50, June 2008. [pdf, slides]
  • Mercier, P. P., D. C. Daly, M. Bhardwaj, D. D. Wentzloff, F. S. Lee, A. P. Chandrakasan, "Ultra-Low-Power UWB for Sensor Network Applications," IEEE International Symposium on Circuits and Systems, pp. 2562-2565, May 2008. [pdf, slides]
  • Daly, D. C., M. Bhardwaj, F. S. Lee, P. P. Mercier, D. D. Wenztloff, J. Voldman, A. P. Chandrakasan, "Energy Efficient Pulsed-UWB Transceiver for Insect Flight Control," Government Microcircuit Applications & Critical Technology Conferece (GOMACTech), pp. 401-404, March 2008.
  • Daly, D. C., A. P. Chandrakasan, "A 6-bit, 0.2V to 0.9V Highly Digital Flash ADC with Comparator Redundancy," IEEE International Solid-State Circuits Conference (ISSCC), pp. 554-555, February 2008. [pdf]
  • Ginsburg, B. P., A. P. Chandrakasan, "Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 240-241, February, 2008. [pdf, slides]
  • Kwong, J, Y. Ramadass, N. Verma, M. Koesler, K. Huber, H. Moormann, A. Chandrakasan, "A 65nm Sub-Vt Microcontroller with Integrated SRAM and Switched-Capacitor DC-DC Converter," IEEE International Solid-State Circuits Conference (ISSCC), pp. 318-319, February 2008. [pdf, slides]
  • Verma, N., A. P. Chandrakasan, "A High-Density 45nm SRAM Using Small-Signal Non-Strobed Regenerative Sensing," IEEE International Solid-State Circuits Conference (ISSCC), pp. 380-381, February 2008. [pdf, slides]

2007

  • Chen, F., A. Joshi, V. Stojanovic, A. Chandrakasan, "Scaling and Evaluation of Carbon Nanotubes for VLSI Applications," Proc. 2nd International Conference on Nano-Networks (Nano-Net 2007), Catania, Italy, Sept. 24-26, 2007. [pdf, slides]
  • Tan, C. S., A. Chandrakasan, R. Reif, "Progress in Copper-based Wafer Bonding," 24th International VLSI/ULSI Multilevel Interconnection Conference, Fremont, CA, September 24-27, 2007. (Invited) [pdf, slides]
  • Bhardwaj, M., A. Chandrakasan, "Coding under Observation Constraints," 45th Allerton Conference on Communications, Control and Computing, September 2007. [pdf, slides]
  • Wentzloff, D. D., F. S. Lee, D. C. Daly, M. Bhardwaj, P. P. Mercier, A. P. Chandrakasan, "Energy Efficient Pulsed-UWB CMOS Circuits and Systems", IEEE International Conference on Ultra-Wideband (ICUWB), September 2007 [pdf, slides]
  • Cho, T. S., K.-J. Lee, J. Kong, A. P. Chandrakasan, "A Low Power Carbon Nanotube Chemical Sensor System", IEEE Custom Integrated Circuits Conference, pp. 181-184, September 2007. [pdf, slides]
  • Sze, V., A. Chandrakasan, "A 0.4-V UWB Baseband Processor," IEEE International Symposium Low Power Electronics and Design, pp. 262-267, August 2007. [pdf, slides]
  • Ramadass, Y., A. P. Chandrakasan, "Voltage Scalable Switched Capacitor DC-DC Converter for Ultra-Low-Power On-Chip Applications," IEEE Power Electronics Specialists Conference (PESC), pp. 2353-2359, June 2007. [pdf, slides]
  • Kern, A., A. Chandrakasan, I. Young, "18Gb/s Optical IO: VCSEL Driver and TIA in 90nm CMOS," IEEE Symposium on VLSI Circuits, pp. 276-277, June 2007. [pdf, slides]
  • Wentzloff, D.D. and A. P. Chandrakasan, "Delay-Based BPSK for Pulsed-UWB Communication," IEEE International Conference on Speech, Acoustics, and Signal Processing, pp. 561-564, April 2007. [pdf, poster]
  • Drego, N., A. Chandrakasan, and D. Boning, "A Test-Structure to Efficiently Measure Threshold-Voltage Variation in Large MOSFET Arrays," Int. Symp. on Quality Electronic Design (ISQED), pp. 281-286, April 2007. [pdf]
  • Ginsburg, B.P., V. Sze, A. P. Chandrakasan, "A Parallel Energy Efficient 100Mbps Ultra-Wideband Radio Baseband," Government Microcircuit Applications & Critical Technology Conference (GOMACTech), pp. 75-78, March 2007.
  • Wang, A., B. H. Calhoun, N. Verma, J. Kwong, A. Chandrakasan, "Ultra-Dynamic Voltage Scaling for Energy Starved Electronics," Government Microcircuit Applications & Critical Technology Conference (GOMACTech), pp. 451-454, March 2007.
  • Lee, F.S., A. P. Chandrakasan, "A 2.5nJ/b 0.65V 3-to-5GHz Subbanded UWB Receiver in 90nm CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 116-117, February 2007. [pdf, slides]
  • Ramadass Y., A. P. Chandrakasan, "Minimum Energy Tracking Loop with Embedded DC-DC Converter Delivering Voltages Down to 250mV in 65nm CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 64-65, February 2007. [pdf, slides]
  • Verma N., A. P. Chandrakasan, "A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy," IEEE International Solid-State Circuits Conference (ISSCC), pp. 328-329, February 2007. [pdf, slides]
  • Wentzloff, D.D., A. P. Chandrakasan, "A 47pJ/pulse 3.1-to-5GHz All-Digital UWB Transmitter in 90nm CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 118-119, February 2007. [pdf, slides]

2006

  • Tan, C. S., K. N. Chen, A. Fan, A. Chandrakasan, and R. Reif, "Silicon Layer Stacking Enabled by Wafer Bonding," Materials Research Society (MRS) Fall Meeting, Boston, MA, Nov 27 - Dec 1, 2006. (Invited)
  • Kwong, J., A. P. Chandrakasan, "Variation-Driven Device Sizing for Minimum Energy Sub-threshold Circuits," International Symposium on Low Power Electronics and Design (ISLPED), pp. 8-13, October 2006. [pdf, slides]
  • Calhoun, B. H., A. Wang, N. Verma, A. P. Chandrakasan, "Sub-threshold Design: The Challenges of Minimizing Circuit Energy," International Symposium on Low Power Electronics and Design (ISLPED), pp. 366-368, October 2006. [pdf, slides]
  • Lee, F., R. Blazquez, B. P. Ginsburg, J. D. Powell, M. Scharfstein, D. D. Wentzloff, A. P. Chandrakasan, "A 3.1 to 10.6 GHz 100 Mb/s Pulse-Based Ultra-Wideband Radio Receiver Chipset," International Conference on Ultra-Wideband, September 2006. [pdf]
  • Ginsburg, B.P., A. P. Chandrakasan, "A 500MS/s 5b ADC in 65nm CMOS," IEEE Symposium on VLSI Circuits, Honolulu, Hawaii, pp. 174-175, June 2006. [pdf, slides]
  • Daly, D. C., A. P. Chandrakasan, "An Energy Efficient OOK Transceiver for Wireless Sensor Networks," IEEE Radio Frequency Integrated Circuits Symposium, pp. 279-282, June 2006. [pdf, slides]
  • Sze, V., R. Blazquez, M. Bhardwaj, A. Chandrakasan, "An Energy Efficient Sub-Threshold Baseband Processor Architecture For Pulsed Ultra-Wideband Communications," IEEE International Conference on Acoustics, Speech and Signal Processing, pp. (III) 908-911, May 2006. [pdf, slides]
  • Chandrakasan, A. P., N. Verma, J. Kwong, D. Daly, N. Ickes, D. Finchelstein, B. Calhoun, "Micropower Wireless Sensors," Presented at NSTI Nanotech, May 7-11, 2006. vol 3, pp. 459-462.
  • Calhoun, B. H., A. P. Chandrakasan, "A 256kb Sub-threshold SRAM in 65nm CMOS," IEEE ISSCC, pp. 628-629, February 2006. [pdf, slides]
  • Verma, N., A. P. Chandrakasan, "A 25uW 100kS/s 12b ADC for Wireless Micro-Sensor Applications," IEEE ISSCC, pp. 222-223, February 2006. [pdf, slides]

2005

  • Ginsburg, B. P., A. P. Chandrakasan, "Dual Scalable 500MS/s, 5b Time-Interleaved SAR ADCs for UWB Applications," IEEE CICC, pp. 403-406, September 2005. [pdf, slides]
  • Checka, N., A. Chandrakasan and R. Reif, "Substrate Noise Analysis and Experimental Verification for the Efficient Noise Prediction of a Digital PLL," IEEE CICC, pp. 473-476, September 2005. [pdf, slides]
  • Lee, F. S., A. P. Chandrakasan, "A BiCMOS Ultra-Wideband 3.1-10.6GHz Front-End," IEEE CICC, pp. 153-156, September 2005. [pdf, slides]
  • Calhoun, B. H., A. P. Chandrakasan, "Analyzing Static Noise Margin for Subthreshold SRAM in 65nm CMOS," IEEE European Solid State Circuits Conference (ESSCIRC), pp. 363-366, September 2005. [pdf, slides]
  • Honore, F., A. P. Chandrakasan, "A power-performance scalable FPGA using configurable voltage domains and a design mapping tool," International Conference on Field Programmable Logic and Applications, pp. 709-710, August 2005. [pdf]
  • Checka, N., D. D. Wentzloff, A. Chandrakasan, R. Reif. "The Effect of Substrate Noise on VCO Performance," IEEE Radio Frequency Integrated Circuits Symposium, pp. 523-526, June 2005. [pdf, slides]
  • Wentzloff, D. D., A. P. Chandrakasan, "A 3.1-10.6 GHz Ultra-Wideband Pulse-Shaping Mixer," IEEE Radio Frequency Integrated Circuits Symposium, pp. 83-86, June 2005. [pdf, slides]
  • Ginsburg, B. P., A. P. Chandrakasan, "An Energy-Efficient Charge Recycling Approach for a SAR Converter With Capacitive DAC," to be presented at IEEE Conference on Circuits and Systems (ISCAS), pp. 184-187, May 2005. [pdf, slides]
  • Kwon, Y.-S., P. Lajevardi, A. P. Chandrakasan, F. Honore, and D. E. Troxel, "A 3-D FPGA Wire Resource Prediction Model Validated using a 3-D Placement and Routing Tool," IEEE System-Level Interconnect Prediction, April 2005. [pdf]
  • Blazquez, R., A. Chandrakasan, "Architectures for Energy-Aware Impulse UWB Communications," ICASSP 2005, Philadelphia, pp. 18-32, March 2005. [pdf, slides]
  • Bougard, B., F. Catthoor, D. C. Daly, A. Chandrakasan and W. Dehaene, "Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives," Design, Automation, and Test in Europe (DATE), pp. 196-201, March 2005. [pdf, slides]
  • Blazquez, R., F. S. Lee, D. D. Wentzloff, B. Ginsburg, J. Powell, A. P. Chandrakasan, "Direct Conversion Pulsed UWB Transceiver Architecture," Design, Automation and Test in Europe, pp. 94-95, March 2005. [pdf, slides]
  • Calhoun, B. H., A. P. Chandrakasan, "Ultra-Dynamic Voltage Scaling Using Sub-threshold Operation and Local Voltage Dithering in 90nm CMOS," IEEE ISSCC, pp. 300-301, February 2005. [pdf, slides]

2004

  • Calhoun, B., A. Wang, A. Chandrakasan, "Device Sizing for Minimum Energy Operation in Subthreshold Circuits," IEEE CICC, pp. 95-98, October 2004. [pdf, slides]
  • Blazquez, R., P. Newaskar, F. Lee, A. P. Chandrakasan, "A Baseband Processor for Pulsed Ultra-wideband Signals," IEEE CICC, pp. 587-590, October 2004. [pdf, slides]
  • Calhoun, B. H., A. Chandrakasan, "Characterizing and Modeling Minimum Energy Operation for Subthreshold Circuits," ISLPED 2004, pp. 90-95, Newport Beach, CA, August 2004. [pdf, slides]
  • Powell, J. D., A. Chandrakasan, "Spiral Slot Patch antenna and Circular Disc Monopole Antenna for 3.1-10.6 GHz Ultra Wideband Communication," ISAP 2004, Sendai, Japan, August 2004. [pdf, slides]
  • Powell, J. D., A. Chandrakasan, "Differential and Single Ended Elliptical Antennas for 3.1-10.6 GHz Ultra Wideband Communication," IEEE Antennas and Propagation Symposium, Monterey, CA, pp. 2935-2938, June 2004. [pdf, slides]
  • Lee, F. S, D. D. Wentzloff, A. P. Chandrakasan, "An Ultra-Wideband Baseband Front-End", IEEE Radio Frequency Integrated Circuits Symposium, pp. 493-496, June 2004. [pdf]
  • Schurgers, C., A. Chandrakasan, "Traceback-Enhanced MAP Decoding Algorithm," International Conference on Acoustics, Speech, and Signal Processing (ICASSP'04), pp. 645-648, May 2004, Montreal, Canada. [pdf]
  • Das, S., A. Chandrakasan, R. Reif, "Timing, Energy, and Thermal Performance of Three-Dimensional Integrated Circuits," In Proc. GLSVLSI, April 2004. [pdf]
  • Wang, A., A. P. Chandrakasan, "A 180mV FFT Processor Using Subthreshold Circuit Techniques," pp. 292-293, ISSCC 2004. [pdf, slides]
  • Wentzloff, D., B. Calhoun, R. Min, A. Wang, N. Ickes, A. Chandrakasan, "Design Considerations for Next Generation Wireless Power-Aware Microsensor Nodes," VLSI Design 2004, pp. 361-367, Mumbai, India. [pdf]

2003

  • Calhoun, B., A. P. Chandrakasan, "Standby Voltage Scaling for Reduced Power," CICC 2003, pp. 639-642, October 2003, Orlando, FL. [pdf]
  • Balzquez, R., F. Lee, P. Newaskar, J. Powell, D. Wentzloff, A. Chandrakasan, "Digital Architecture for an Ultra-Wideband Radio Receiver," Vehicular Technology Conference, pp. 1303-1307, October 2003. [pdf, slides]
  • Blazquez, R., P. Newaskar, A. Chandrakasan, "Coarse Acquisition, for Ultra Wideband Receivers," ICASSP 2003, Hong Kong, Volume 4, pp. IV_137-IV_140, April 2003. [pdf]
  • Wang, A., A. P. Chandrakasan, "Energy-aware architectures for a Real-Valued FFT implementation," ISLPED 2003, Korea, pp.360-365, August 2003. [pdf]
  • Calhoun, B., F. Honore, A. P. Chandrakasan, "Design Methodology for Fine-Grained Leakage Control in MTCMOS," ISLPED 2003, Korea, pp. 104-109, August 2003. [pdf]
  • Das, S., A. Chandrakasan, R. Reif, "Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools." In Proc. ISVLSI, pp. 13-18, Feb. 2003. [pdf]
  • Basten, T., Benini, L., A. P. Chandrakasan, M. Lindwer, J. Liu, R. Min, F. Zhao, "Scaling into Ambient Intelligence," DATE-2003, pp. 76-81, 2003. [pdf]
  • Das, S., A. P. Chandrakasan, R. Reif, "Design Tools for 3-D Integrated Circuits," ASP-DAC 2003, pp. 53-56, January 2003. [pdf]

2002

  • Min, R., M. Bhardwaj, N. Ickes, A. Wang, A. P. Chandrakasan, "The Hardware and the Network: Total-System Strategies for Power Aware Wireless Microsensors," Proc. IEEE CAS Workshop on Wireless Communications and Networking, September 2002 (Invited). [pdf]
  • Kao, J., S. Narendra, A. P. Chandrakasan, "Sub-threshold Leakage Modeling and Reduction Techniques," (Embedded Tutorial), IEEE/ACM ICCAD, San Jose, California, pp.141-148, November 2002. [pdf, presentation Part I - PDF, Part II - PDF]
  • Newaskar, P., R. Balzquez, A. P. Chandrakasan, "A/D Precision Requirements for an Ultra-Wideband Radio Receiver," IEEE Workshop on Signal Processing Systems, San Diego, California, pp. 270-275, October 2002. [pdf]
  • Chandrakasan, A. P., R. Min, M. Bhardwaj, S. Cho, A. Wang, "Power Aware Wireless Microsensor Systems," IEEE ESSCIRC/ESSDERC, Florence, Italy, September 2002 (Plenary Paper). [pdf, slides]
  • Sotiriadis, P., O. Franza, D. Bailey, B. Calhoun, D. Lin, A. Chandrakasan, "Fast Algorithm for Clock Grid Simulation," IEEE ESSCIRC 2002, Florence, Italy, September 2002.
  • Narendra, S., V. De, S. Borkar, D. Antoniadis, and A. P. Chandrakasan, "Full-Chip Sub-Threshold Leakage Power Prediction Model for sub-0.18 um CMOS," IEEE International Symposium on Electronics and Design, pp. 19-23, Monterey, California, pp.19-23, August 2002. [pdf]
  • Min, R., A. P. Chandrakasan, "A Framework for Energy-Scalable Communication in High-Density Wireless Networks," IEEE International Symposium on Electronics and Design, pp. 36-41, Monterey, California, August 2002. [pdf]
  • Sotiriadis, P.P. V. Tarokh. A. Chandrakasan, "Energy reduction and fundamental energy limits in digital VLSI circuits," International Symposium on Information Theory, pp. 393, July 2002. [pdf]
  • Bhardwaj, M., A. P. Chandrakasan, "Bounding the Lifetime of Sensor Networks Via Optimal Role Assignments," IEEE Infocom, pp. 1587-1596, New York, June 2002. [pdf, slides]
  • Cho, S., A. P. Chandrakasan, "A 6.5GHz CMOS FSK Modulator for Wireless Sensor Applications," IEEE Symposium on VLSI Circuits, pp. 182-185, Honolulu, Hawaii, June 2002. [pdf]
  • Sotiriadis, P., A. P. Chandrakasan, V. Tarokh, "Maximum Achievable Energy Reduction Using Coding with Applications to Deep Sub-Micron Buses," IEEE ISCAS, pp. 85-88, Scottsdale, Arizona, May 2002. [pdf]
  • Wang, A., Chandrakasan, A. P., S. Kosonocky, "Optimal Supply and Threshold Scaling for Sub-threshold CMOS circuits," IEEE Computer Society Annual Symposium on VLSI, pp. 5-9, Pittsburgh, Pennsylvania, April 2002. [pdf]
  • Tschanz, J., J. Kao, S. Narendra, R. Nair, D. Antoniadis, A. P. Chandrakasan, V. De, "Adaptive Body-bias for Reducing Impacts of Die-to-Die and Within-Die Parameter Variations on Microprocessor," IEEE ISSCC, 422-423, San Francisco, California, February 2002. [pdf, supplement]
  • Miyazaki, M. J. Kao, A. Chandrakasan, "A 175mV Multiply-Accumulate Unit Using an Adaptive Supply Voltage Voltage and Body Bias (ASB) Architecture," IEEE ISSCC, pp. 58-59, San Francisco, California, February 2002. [pdf]

2001

  • Min, R., A. P. Chandrakasan, "Energy-Efficient Communication for Ad-hoc Wireless Sensor Networks," 35th Asilomar Conference on Signals, Systems, and Computers, pp. 139-143, Monterey, California, November 2001. [pdf]
  • Sinha, A., A. P. Chandrakasan, "Energy Efficient Real-Time Scheduling," IEEE/ACM International Conference on Computer-Aided Design, pp. 458-463, San Jose, California, November 2001. [pdf, slides]
  • Kao, J., A. P. Chandrakasan, "MTCMOS Sequential Circuits," IEEE ESSCIRC, September 2001. [pdf]
  • Ng, C., A. P. Chandrakasan, "Design of a Power-Scalable Digital Least-Means-Square Adaptive Filter," Symposium on Signal Processing and its Applications, pp. 292-295, Kuala Lumpur, Malaysia, August 2001. [pdf]
  • Shih, E., S. Cho, N. Ickes, R. Min, A. Sinha, A. Wang, and A. Chandrakasan, "Physical Layer Driven Algorithm and Protocol Design for Energy-Efficient Wireless Sensor Networks," Proceedings of MOBICOM 2001, Rome, Italy, pp. 272-287, July 2001. [pdf, slides)
  • Wang, A., S-H. Cho, C.G. Sodini, A. P. Chandrakasan, "Energy Efficient Modulation and MAC for Asymmetric RF Microsensor Systems," IEEE/ACM International Symposium on Low Power Electronics and Design, pp. 106-111, Huntington Beach, California, August 2001. [pdf]
  • Sotiriadis, P., T. Konstantakopoulos, A. P. Chandrakasan, "Analysis and Implementation of Charge Recycling for Sub-micron Buses," IEEE/ACM International Symposium on Low Power Electronics and Design, pp. 364-369, Huntington Beach, California, August 2001. [pdf]
  • Narendra, S., A. P. Chandrakasan, D. Antoniadis, S. Borkar, and V. De, "Scaling of Stack Effect and its Application for Leakage Reduction," IEEE/ACM International Symposium on Low Power Electronics and Design, pp. 195-200, Huntington Beach, California, August 2001. [pdf]
  • Sinha, A., A. P. Chandrakasan, "JouleTrack - A Web Based Tool For Software Energy Profiling," ACM/IEEE Design Automation Conference, pp. 220-225, Las Vegas, Nevada, June 2001. [pdf, slides, SA-1100 Models]
  • Shih, E., B. H. Calhoun. S. Cho, A. P. Chandrakasan, "Energy-Efficient Link-Layer for Wireless Microsensor Networks," IEEE Computer Society Workshop on VLSI '01, pp. 16-21, Orlando, Florida, April 2001. [pdf, slides]
  • Sam, S., A. P. Chandrakasan, D. Boning, "Variation Issues in On-chip optical Clock Distribution," International Workshop on Statistical Methodologies for VLSI Design and Fabrication, Kyoto, Japan, June 2001. [pdf]
  • Bhardwaj, M., T. Garnett, A. P. Chandrakasan, "Upper Bounds on Lifetime of Sensor Networks," Proc. of International Conference on Communications, pp. 785-790, Helsinki, Finland, June 2001. [pdf]
  • Rahman, A., S. Das, A. P. Chandrakasan, R. Reif, "Wiring Requirement and Three-Dimensional Integration of Field-Programmable Gate Arrays," IEEE/ACM International Workshop on System-Level Interconnect Prediction, California, pp. 107-113, March 2001. [pdf]
  • Wang, A., A. P. Chandrakasan, "Energy Efficient System Partitioning For Distributed Wireless Sensor Networks," Proceedings of ICASSP, pp. 905-908, Salt Lake City, Utah, May 2001. [pdf, slides]
  • Cho, S., A. P. Chandrakasan, "Energy Efficient Protocols for Low Duty Cycle Wireless Microsensor Networks," IEEE ICASSP, pp. 2041-2044, Salt Lake City, Utah, May 2001 (special session). [pdf, slides]
  • Goodman, J., A. P. Chandrakasan, "An Energy Efficient IEEE 1363-based Reconfigurable Public-Key Cryptography Processor," IEEE International Solid-State Circuits Conference, pp. 330-331, Feb. 2001, San Francisco, California. [pdf, slides]
  • Sotiriadis, P., A. P. Chandrakasan, "Reducing Bus Delay in Submicron Technology Using Coding," ASP-DAC, pp. 109-114, Yokohama, Japan, January 2001. [pdf]
  • Min, R., M. Bhardwaj, S. Cho, E. Shih, A. Sinha, A. Wang, A. P. Chandrakasan, "Low-Power Wireless Sensor Networks," 14th Interconational Conference on VLSI Design 2001, pp. 205-210, Bangalore, India, January 2001. (Invited Paper). [pdf, slides]
  • Sinha, A., A. P. Chandrakasan, "Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces," VLSI Design 2001, pp. 221-226, Bangalore, India, January 2001. [pdf, slides]
  • Sinha, A., A. P. Chandrakasan, "Operating System and Algorithmic Techniques for Energy Scalable Wireless Sensor Networks," 2nd International Conference on Mobile Data Management (MDM '01), Hong Kong, January 2001. [pdf, slides]

2000

  • Bhardwaj, M., R. Min, A. P.Chandrakasan, "Power-Aware Systems," 34th Asilomar Conference on Signals, Systems, and Computers, pp. 1695-1701, Monterey, California, November 2000. [pdf, slides]
  • Min, R., B. Bhardwaj, S. Cho, A. Sinha, E. Shih, A. Wang, A. P. Chandrakasan, "An Architecture for a Power-Aware Distributed Microsensor Node," IEEE Workshop on Signal Processing Systems (SiPS '00), pp. 581-590, Louisiana, Lafayette, October 2000. [pdf, slides| poster PDF]
  • Sotiriadis, P. A. P. Chandrakasan "Bus Energy Minimization by Transition Pattern Coding (TPC) in Deep Submicron Technologies," IEEE/ACM International Computer-Aided Design Conference, pp. 320-327, San Jose, California, November 2000. [pdf]
  • Sotiriadis, P., A. Wang, A. P. Chandrakasan, "Transition Pattern Coding: An approach to Reduce Energy in Interconnect," IEEE ESSCIRC, pp. 320-323, Stockholm, Sweden, Sept. 2000. [pdf]
  • Lavana, H., F. Brglez, R. Reese, G. Konduri, A. P. Chandrakasan, "OpenDesign: An Open User-Configurable Project Environment for Collaborative Design and Execution on the Internet," IEEE Intl. Conference on Computer Design, pp. 567-570, Austin, Texas, September 2000. [pdf]
  • Goodman, J., A. P. Chandrakasan, "An Energy Efficient Reconfigurable Public-Key Cryptograhpy Processor Architecture," CHES 2000, pp. 175-190, Worchester, Massachusetts, August 2000.
  • Gutnik, V., A. P. Chandrakasan, "On-chip Picosecond Time Measurement," IEEE Symposium on VLSI Circuits, pp. 52-53, Honolulu, Hawaii, June 2000. [pdf]
  • Mehrotra, V., S. Sam, D. Boning, A. P. Chandrakasan, R. Vallishayee, S. Nassif, "A Methodology for Modeling the Effects of Systematic Within-Die Interconnect and Device Variation on Circuit Performance," IEEE/ACM Design Automation Conference, pp. 172-175, Los Angeles, California, June 2000. [pdf]
  • Sinha, A., A. Wang, A. Chandrakasan, "Algorithmic Transforms for Efficient Energy Scalable Computation," The 2000 IEEE International Symposium on Low-Power Electronic Design (ISLPED' 00), pp. 31-36, Rapallo, Italy, August 2000. [pdf, slides]
  • Heinzelman, W., A. Sinha, A. Wang, A. Chandrakasan, "Energy-scalable Algorithms and Protocols for Wireless Microsensor Networks," pp. 3722-3725, Istanbul, Turkey, ICASSP 2000. [pdf, slides]
  • Sotiriadis, P., A. P. Chandrakasan, "Low Power Bus Coding Techniques Considering Inter Wire Capacitance," IEEE CICC, pp. 507-510, Orlando, Florida, May 2000. [pdf]
  • Min, R., T. Furrer, "Dynamic Voltage Scaling Techniques for Distributed Microsensor Networks," IEEE CS Workshop on VLSI, pp. 43-46, Orlando, Florida, April 2000. [pdf, slides]
  • Sinha, A., A. P. Chandrakasan, "Energy Aware Software," VLSI Design 2000, pp. 50-55, Calcutta, India, January 2000. [pdf]
  • Chandrakasan, A., J. Goodman, J. Kao, A. Sinha, P. Sotiriadis "Low Power Design Issues and Solutions for Future VLSI Systems," International Symposium on Key Technologies for Future VLSI Systems, pp. 17-20, Tokyo, Japan, January 2000 (Invited Paper).
  • Gutnik, V. A. P. Chandrakasan, "Active GHz Clock Network using Distributed PLLs," IEEE ISSCC, pp. 174-175, San Francisco, California, February 2000. [pdf], slides]
  • Amirtharajah, R., S. Meninger, J. Oscar Mur-Miranda, A. P. Chandrakasan, and J. Lang, "A Micropower Programmable DSP Powered Using a MEMS-Based Vibration-to-Electric Energy Converter," IEEE ISSCC, pp. 362-363, San Francisco, California, February 2000. [pdf, slides]
  • W. Rabiner Heinzelman, A. P. Chandrakasan, and H. Balakrishnan, "Energy-Efficient Routing Protocols for Wireless Microsensor Networks," Hawaii International Conference on System Sciences (HICSS '00), January 2000. [pdf]

1999

  • Wang, A., W. Rabiner, A. P. Chandrakasan, "Energy-Scalable Protocols for Battery-Operated Microsensor Networks," IEEE Workshop on Signal Processing Systems (SiPS), pp. 483-492, Taipei, Taiwan, October 1999. [pdf]
  • Gutnik, V., A. P. Chandrakasan, "Distributed Active Clock Network," IEEE European Solid State Circuits Conference, Duisburg, Germany, September 1999. [pdf]
  • Sinha, A., A. P. Chandrakasan, "Energy Efficient Filtering Using Adaptive Precision and Variable Voltage," IEEE ASIC '99, Washington DC, September 1999. [pdf]
  • Amirtharajah, R., T. Xanthopoulos, A. P. Chandrakasan, "Power Scalable Processing Using Distributed Arithmetic," IEEE/ACM International Symposium on Low Power Electronics and Design, pp. 170-175, San Diego, California August 1999. [pdf]
  • Meninger, S., J. Mur-Miranda, R. Amirtharajah, A. P. Chandrakasan, J. Lang, "Vibration-to-Electric Energy Conversion," IEEE/ACM International Symposium on Low Power Electronics and Design, pp. 48-53, San Diego, California, August 1999. [pdf]
  • Xanthopoulos, T., A. P. Chandrakasan, "A Low-Power DCT Core Using Adaptive Bitwidth and Arithmetic Activity Exploiting Signal Correlations and Quantization," IEEE Symposium on VLSI Circuits, pp. 11-12, Kyoto, Japan, June 1999. [pdf]
  • Konduri, G., A. P. Chandrakasan, "A framework for Collaborative and Distributed Web-based Design," IEEE/ACM Design Automation Conference, pp. 898-903, New Orleans, Lafayette, June 1999. [pdf]
  • Goodman, J., A. Dancy, A. P. Chandrakasan, "Design and Implementation of a Scalable Encryption Processor with Embedded Variable DC/DC Converter," IEEE/ACM Design Automation Conference, pp. 855-860, New Orleans, Lafayette, June 1999. [pdf]
  • Chandrakasan, A. P., R. Amirtharajah, S. Cho, J. Goodman, G. Konduri, J. Kulik, W. Rabiner, A. Wang, "Design Considerations for Distributed Microsensor Systems," IEEE Custom Integrated Circuits Conference (Invited Talk), pp. 279-286, San Diego, California, May 1999. [pdf]
  • Konduri, G., J. Goodman, A. Chandrakasan, "Energy Efficient Software Through Dynamic Voltage Scheduling," IEEE ISCAS, 358-361, May 1999. [pdf]
  • Chandrakasan, A. P., A. Dancy, J. Goodman, T. Simon, "A Low Power Wireless Camera System," VLSI Design '99 Conference, pp. 32-36, Goa, India, January 1999. [pdf]

1998

  • Dancy, A., A. P. Chandrakasan, "A Reconfigurable Dual Output Low Power Digital PWM Power Converter," IEEE/ACM International Symposium on Low-Power Electronics and Design, pp. 191-196, Monterey, California, August 1998. [pdf]
  • T. Xanthopoulos, A. P. Chandrakasan, "A Low-Power IDCT Macrocell for MPEG2 MP@ML Exploiting Data Distribution Properties for Minimal Activity, " IEEE Symposium on VLSI Circuits, pp. 38-39, Honolulu, Hawaii, June 1998. [pdf]
  • Kao, J., S. Narendra, A. P. Chandrakasan, "MTCMOS Hierarchical Sizing Based on Mutual Exclusive Discharge Patterns," IEEE/ACM Design Automation Conference, pp. 495-500, San Francisco, California, June 1998 [pdf]
  • Chandrakasan, A., R. Amirtharajah, W. Rabiner, J. Goodman, "Trends in Low Power Digital Signal Processing," (special invited session), IEEE International Symposium on Circuits and Systems, pp. 604-607, Monterey, California, May 1998 [pdf]
  • Cho, S., T. Xanthopoulos, A. P. Chandrakasan, "An Ultra Low Power Variable Length Decoder for MPEG-2 Exploiting Codeword Distribution," IEEE Custom Integrated Circuits Conference, pp. 110-111, Santa Clara, California, May 1998 [pdf]
  • A. P. Chandrakasan, J. Goodman, J. Kao, W. Rabiner, T. Simon, "Design of a Low Power Wireless Camera," IEEE CS Annual Workshop on VLSI: System Level Design, pp. 24-27, Orlando, Florida, April 1998 [pdf]
  • Goodman, J. A. P. Chandrakasan, "A 1Mb/s Energy/Security Scalable Encryption Processing Using Adaptive Width and Supply," IEEE International Solid-state Circuits Conference, pp. 110-111, San Francisco, California, Feb. 1998 [pdf]
  • Saha, D., A. P. Chandrakasan, "Web-based Distributed VLSI Design," VLSI Design '98 Conference, pp. 449-454, Madras, India, January 1998 [pdf]

1997

  • Chandrakasan, A. P., "Voltage Reduction Techniques for Portable Systems," IEEE ASIC Conference, pp. 3-6, Portland, Oregon, Sept. 1997 (Invited Paper) [pdf]
  • Saha, D., A. P. Chandrakasan, "A Framework for Distributed Web-based Microsystem Design," IEEE Sixth Workshop on Enabling Technologies: Infrastructure for Collaborative Enterprises, pp. 69-74, Cambridge, MA June 1997 [pdf]
  • Dancy, A., A. P. Chandrakasan, "Ultra Low Power Control Circuits for PWM Converters," IEEE Power Electronics Specialists Conference, St. Louis, Missouri, pp. 21-27, June 1997 [pdf]
  • Amirtharajah, R., A. P. Chandrakasan, "Self Powered Low Power Signal Processing," IEEE Symposium on VLSI Circuits, pp. 25-26, Kyoto, Japan, June 1997 [pdf]
  • Xanthopoulos, T., Y. Yaoi, A. Chandrakasan, "Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT" IEEE/ACM Design Automation Conference, pp. 415-420, Anaheim, California, June 1997 [pdf]
  • Kao, J., A. Chandrakasan, D. Antoniadis, "Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology," IEEE/ACM Design Automation Conference, pp. 409-414, Anaheim, California, June 1997 [pdf]
  • Cho, S., T. Xanthopoulos, A. P. Chandrakasan, "Design of Low Power Variable Length Decoder Using Fine Grain Non-Uniform Table Partitioning," IEEE International Symposium on Circuits and Systems, pp. 2156-2159, Hong Kong, June 1997 [pdf]
  • Dancy, A., A. Chandrakasan, "Techniques for Aggressive Supply Voltage Scaling and Efficient Regulation," IEEE Custom Integrated Circuits Conference, pp. 579-586, May 1997 [pdf]
  • Rabiner, W., A. P. Chandrakasan, "Network Driven Motion Estimation For Portable Video Terminals," IEEE International Conference on Acoustic, Speech, and Signal Processing, Vol. 4, pp.2865-2868, April 1997 [pdf]

1996

  • Winograd, J. M., J. T. Ludwig, S. H. Nawab, A. V. Oppenheim, A. P. Chandrakasan, "Flexible Systems for Digital Signal Processing," AAAI Symp. on Flexible Computations in Intelligent Systems, Cambridge, MA, Nov. 1996.
  • Hadjiyiannis, G., A. P. Chandrakasan, S. Devadas, "A Low Power, Low Bandwidth Protocol for Remote Wireless Terminals," IEEE Global Telecommunications Conference, pp.22-28, November 1996. [pdf]
  • Goodman, J., T. Simon, W. Rabiner, A. P. Chandrakasan, "Signal Processing for an Ultra Low Power Wireless Video Camera," International Workshop on Mobile Multimedia Communications, September 1996. Paper published in "Mobile Multimedia Communications," Plennum Publishing Corporation, New York, 1997.
  • Xanthopoulos, T., A. P. Chandrakasan, C. Sodini, B. Dally, "A Data-Driven IDCT Architecture for Low Power Video Applications," IEEE European Solid State Circuits Conference, pp. 196-199, September 1996. [pdf]
  • Ludwig, J., H. Nawab, A. P. Chandrakasan, "Convergence Results on Adaptive Approximate Filtering,'' Advanced Signal Processing Algorithms, F. T. Luk (Ed.), Proc. SPIE, August 1996.
  • Chandrakasan, A. P., V. Gutnik, T. Xanthopoulos, "Data Driven Signal Processing: An Approach for Energy Efficient Computing," ACM/IEEE International Symposium on Low Power Electronics and Design, pp. 347-352, August 1996 (Invited Paper). [pdf]
  • Gutnik, V., A. P. Chandrakasan, "An Efficient Controller for Variable Supply Voltage Low Power Processing," IEEE Symposium on VLSI Circuits, pp. 158-159, June 1996. [pdf]
  • Chandrakasan, A., I. Yang, C. Vieri, D. Antoniadis, "Design Considerations and Tools for Low-voltage Digital System Design," IEEE/ACM Design Automation Conference, pp. 113-118, June 1996. [pdf]
  • Mizuki, M. M., U. Desai, I. Masaki, A. P. Chandrakasan, "A Binary Block Matching Architecture With Reduced Power Consumption and Silicon Area Requirement," IEEE International Conference on Acoustic, Speech, and Signal Processing, pp. 3248-3251, 1996. [pdf]
  • Chandrakasan, A. P., "Ultra Low Power Digital Signal Processing," VLSI Design 96 Conference, pp. 352-357, Bangalore, India, January 1996. [pdf]

1995

  • Yang, I., C. Vieri, A. P. Chandrakasan, D. Antoniadis, "Back Gated CMOS on SOIAS for Dynamic Threshold Control," IEEE International Electron Devices Meeting, pp. 877-880, Washington, DC, December 1995. [pdf]
  • Vieri, C., I. Yang, A. P. Chandrakasan, D. Antoniadis, "SOIAS: Dynamically Variable Threshold SOI with Active Substrate," IEEE Symposium on Low Power Electronics, pp. 86-87, Dana Point, California, October 1995. [pdf]
  • Potkonjak, M., A. P. Chandrakasan, "Synthesis and Selection of DCT Algorithms using Behavioral Synthesis-based Algorithm Space Exploration," IEEE International Conference on Image Processing, Washington, D.C., pp. 65-68, October 1995. [pdf]
  • Winograd, J., J. Ludwig, H. Nawab, A. P. Chandrakasan, A. Oppenheim, "Approximate Processing and Incremental Refinement Concepts," Proc. 2nd ARPA Rapid Prototyping of Application-Specific Signal Processors Conference, pp. 257-261, July 1995.
  • Ludwig, J. T., S. Nawab, A. P. Chandrakasan, "Low Power Filtering Using Approximate Processing for DSP," IEEE Custom Integrated Circuits Conference, pp. 185-188, May 1995. [pdf]