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Journal and Magazine Publications

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2014

  • Desai, N., J. Yoo, A. P. Chandrakasan, "A Scalable, 2.9 mW, 1 Mb/s e-Textiles Body Area Network Transceiver With Remotely-Powered Nodes and Bi-Directional Data Communication," IEEE Journal of Solid-State Circuits, vol.49, no.9, pp.1995-2004, Sept. 2014. [link]
  • Tikekar, M., C.-T. Huang, C. Juvekar, V. Sze, A. P. Chandrakasan, "A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications," IEEE Journal of Solid-State Circuits, vol. 49, no. 1, pp. 61-72, Jan. 2014. [link]
  • Sinangil, M. E., A. P. Chandrakasan, "Application-Specific SRAM Design Using Output Prediction to Reduce Bit-Line Switching Activity and Statistically Gated Sense Amplifiers for Up to 1.9× Lower Energy/Access," IEEE Journal of Solid-State Circuits, vol. 49, no. 1, pp. 107-117, Jan. 2014. [link]
  • Qazi, M., A. Amerasekera, A. P. Chandrakasan, "A 3.4-pJ FeRAM-Enabled D Flip-Flop in 0.13-μm CMOS for Nonvolatile Processing in Digital Systems," IEEE Journal of Solid-State Circuits, vol. 49, no. 1, pp. 202-211, Jan. 2014. [link]

2013

  • Rithe, R., P. Raina, N. Ickes, S. V. Tenneti, A. P. Chandrakasan, "Reconfigurable Processor for Energy-Efficient Computational Photography," IEEE Journal of Solid-State Circuits, vol. 48, no. 11, pp. 2908-2919, Nov. 2013. [link]
  • Du, E., S. Ha, M. Diez-Silva, M. Dao, S. Suresh, A. P. Chandrakasan, "Electric impedance microflow cytometry for characterization of cell disease states", Lab on a Chip, vol. 13, 2013. [link]
  • Yip, M., A.P. Chandrakasan, "A Resolution-Reconfigurable 5-to-10-Bit 0.4-to-1 V Power Scalable SAR ADC for Sensor Applications," IEEE Journal of Solid-State Circuits, vol. 48, no. 6, pp. 1453-1464, Jun. 2013. [link]
  • Paidimarri, A., P. M. Nadeau, P. P. Mercier, A. P. Chandrakasan, "A 2.4 GHz Multi-Channel FBAR-based Transmitter With an Integrated Pulse-Shaping Power Amplifier," IEEE Journal of Solid-State Circuits, vol.48, no.4, pp.1042-1054, April 2013. [link]
  • Chen, F., F. Lim, O. Abari, A. Chandrakasan, V. Stojanovic, "Energy-Aware Design of Compressed Sensing Systems for Wireless Sensors Under Performance and Reliability Constraints," IEEE Transactions on Circuits and Systems, vol. 60, no. 3, pp. 650-661, Mar. 2013. [link]
  • Yoo, J., L. Yan, D. El-Damak, M. A. B. Altaf, A. H. Shoeb, A. P. Chandrakasan, "An 8-Channel Scalable EEG Acquisition SoC With Patient-Specific Seizure Classification and Recording Processor", IEEE Journal of Solid-State Circuits, vol.48, no.1, pp. 214 - 228, Jan. 2013. [link]
  • Lee, K.-J., H. Park, J. Kong, A. P. Chandrakasan, "Demonstration of a Subthreshold FPGA using Monolithically Integrated Graphene Interconnects," IEEE Transactions on Electron Devices, vol. 60, no. 1, pp. 383-390, Jan 2013. [link]

2012

  • Qazi, M., M. Tikekar, L. Dolecek, D. Shah, A. P. Chandrakasan, "Technique for Efficient Evaluation of SRAM Timing Failure," IEEE Transactions on Very Large Scale Integration Systems, accepted June 2012. [link]
  • Mercier, P. P., A. C. Lysaght, S. Bandyopadhyay, A. P. Chandrakasan, K. M. Stankovic, "Energy extraction from the biologic battery in the inner ear," Nature Biotechnology, Nov. 2012. [link]
  • Rithe, R., C.-C. Cheng, A. P. Chandrakasan, "Quad Full-HD Transform Engine for Dual-Standard Low-Power Video Coding," IEEE Journal of Solid-State Circuits, vol.47, no.11, pp.2724-2736, Nov. 2012 [link]
  • Sinangil, M. E., M. Yip, M. Qazi, R. Rithe, J. Kwong, A. P. Chandrakasan, "Design of Low-Voltage Digital Building Blocks and ADCs for Energy-Efficient Systems," IEEE Transactions on Circuits and Systems II: Express Briefs, vol.59, no.9, pp.533-537, Sept. 2012 [link]
  • Bandyopadhyay, S., A. P. Chandarkasan, "Platform Architecture for Solar, Thermal, and Vibration Energy Combining with MPPT and Single Inductor," IEEE Journal of Solid-State Circuits, vol. 47, no.9, pp-2199-2215, Sept 2012. [link]
  • Lee, S., A. P. Chandrakasan, H.-S. Lee, "A 12b 5-to-50 MS/s 0.5-to-1 V Voltage Scalable Zero-Crossing Based Pipelined ADC", IEEE Journal of Solid-State Circuits, vol.47, no.7, pp.1603-1614, July 2012. [link]
  • Rithe, R., S. Chou, J. Gu, A. Wang, S. Datla, G. Gammie, D. Buss, A. Chandrakasan, "The Effect of Random Dopant Fluctuations on Logic Timing at Low Voltage," IEEE Transactions on Very Large Scale Integration (TVLSI) Systems, Vol. 20, No. 5, 911-924, May 2012. [link]
  • Chen, F., A. P. Chandrakasan, V. M. Stojanovic, "Design and Analysis of a Hardware-Efficient Compressed Sensing Architecture for Data Compression in Wireless Sensors, " IEEE Journal of Solid-State Circuits, vol.47, no.3, pp.744-756, March 2012. [link]
  • Qazi, M., M. Clinton, S. Bartling, A. P. Chandrakasan, "A Low-Voltage 1 Mb FRAM in 0.13 μm CMOS Featuring Time-to-Digital Sensing for Expanded Operating Margin," IEEE Journal of Solid-State Circuits, vol.47, no.1, pp.141-150, Jan. 2012. [link]
  • Sze, V., A. P. Chandrakasan, "A Highly Parallel and Scalable CABAC Decoder for Next Generation Video Coding," IEEE Journal of Solid-State Circuits, vol.47, no.1, pp.8-22, Jan. 2012. [link]
  • Ickes, N., G. Gammie, , M. E. Sinangil, R. Rithe, J. Gu, A. Wang, H. Mair, S. Datla, B. Rong, S. Honnavara-Prasad, L. Ho, G. Baldwin, D. Buss, A. P. Chandrakasan, U. Ko, "A 28 nm 0.6 V Low Power DSP for Mobile Applications," IEEE Journal of Solid-State Circuits, vol.47, no.1, pp.35-46, Jan. 2012. [link]

2011

  • Bandyopadhyay, S., Y. Ramadass, A. P. Chandrakasan, "20 μA to 100 mA DC-DC Converter With 2.8-4.2 V Battery Supply for Portable Applications in 45 nm CMOS", IEEE Journal of Solid-State Circuits, vol. 46, no.12, pp-2807-2820, Dec. 2011. [link]
  • Lajevardi, P., A. P. Chandrakasan, H.-S. Lee, "Zero-Crossing Detector Based Reconfigurable Analog System," IEEE Journal of Solid-State Circuits, vol.46, no.11, pp.2478-2487, Nov. 2011. [link]
  • Kwong, J., A. P. Chandrakasan, "An Energy-Efficient Biomedical Signal Processing Platform," IEEE Journal of Solid-State Circuits, vol.46, no.7, pp.1742-1753, July 2011. [link]
  • Mercier, P. P., A. P. Chandrakasan, "A Supply-Rail-Coupled eTextiles Transceiver for Body-Area Networks," IEEE Journal of Solid-State Circuits, vol. 46, no. 6, pp 1284-1295, June 2011. [link]
  • Drego, N., A. Chandrakasan, D. Boning, D. Shah, "Reduction of Variation-Induced Energy Overhead in Multi-Core Processors," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.30, no.6, pp.891-904, June 2011. [link]
  • Bohorquez, J. L., M. Yip, A. P. Chandrakasan, J. L. Dawson, "A Biomedical Sensor Interface with a sinc Filter and Interference Cancellation," IEEE Journal of Solid-State Circuits, vol. 46, no. 4, pp 746-756, April 2011. [link]
  • Qazi, M., M. E. Sinangil, A. P. Chandrakasan, "Challenges and Directions for Low-Voltage SRAM," Design & Test of Computers, IEEE , vol.28, no.1, pp.32-43, Jan.-Feb. 2011. [link]
  • Qazi, M., K. Stawiasz, L. Chang, A. P. Chandrakasan, "A 512kb 8T SRAM Macro Operating Down to 0.57V With an AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45nm SOI CMOS," IEEE Journal of Solid-State Circuits, vol. 46, no. 1, pp 85-96, Jan 2011. [link]
  • Ramadass, Y. K., A. P. Chandrakasan, "A Battery-Less Thermoelectric Energy Harvesting Interface Circuit With 35mV Startup Voltage," IEEE Journal of Solid-State Circuits, vol. 46, no. 1, pp 333-341, Jan 2011. [link]

2010

  • Lee, K.-J., M. Qazi, J. Kong, A. P. Chandrakasan, "Low-Swing Signaling on Monolithically Integrated Global Graphene Interconnects," IEEE Transactions on Electron Devices, vol. 57, no. 12, pp 3418-3425, Dec 2010. [pdf]
  • Ramadass, Y. K., A. A. Fayed, A. P. Chandrakasan, "A Fully-Integrated Switched-Capacitor Step-Down DC-DC Converter With Digital Capacitance Modulation in 45nm CMOS," IEEE Journal of Solid-State Circuits, vol. 45, no. 12, pp 2557-2565, Dec 2010. [pdf]
  • Mercier, P. P., M. Bharadwaj, D. C. Daly, A. P. Chandrakasan, "A Low-Voltage Energy-Sampling IR-UWB Digital Baseband Employing Quadratic Correction," IEEE Journal of Solid-State Circuits, vol. 45, no. 6, pp 1209-1219, June 2010. [pdf]
  • Verma, N., A. Shoeb, J. Bohorquez, J. Dawson, J. Guttag, A. P. Chandrakasan, "A Micro-Power EEG Acquisition SoC With Integrated Feature Extraction Processor for a Chronic Seizure Detection System," IEEE Journal of Solid-State Circuits, vol. 45, no. 4, pp 804-816, April 2010. [pdf]
  • Drego, N., A. Chandrakasan, D. Bonning, "All-Digital Circuits for Measurement of Spatial Variation in Digital Circuits," IEEE Journal of Solid-State Circuits, vol. 45, no. 3, pp 640-651, March 2010. [pdf]
  • Chandrakasan, A. P., D. C. Daly, D. F. Finchelstein, J. Kwong, Y. K. Ramadass, M. E. Sinangil, V. Sze, N. Verma, "Technologies for Ultradynamic Voltage Scaling," Proceedings of the IEEE, vol. 98, no. 2, pp 191-214, February 2010. [pdf]
  • Daly, D. C., P. P. Mercier, M. Bhardwaj, A. L. Stone, Z. N. Aldworth, T. L. Daniel, J. Voldman, J. G. Hildebrand, A. P. Chandrakasan, "A Pulsed UWB Receiver SoC for Insect Motion Control," IEEE Journal of Solid-State Circuits, vol. 45, no. 1, pp 153-166, January 2010. [pdf]
  • Ramadass, Y. K., A. P. Chandrakasan, "An Efficient Piezoelectric Energy Harvesting Interface Circuit Using a Bias-Flip Rectifier and Shared Inductor," IEEE Journal of Solid-State Circuits, vol. 45, no. 1, pp 189-204, January 2010. [pdf]

2009

  • Bohorquez, J. L., A.P. Chandrakasan, J.L. Dawson, "Frequency-Domain Analysis of Super-Regenerative Amplifiers," IEEE Transactions on Microwave Theory and Techniques, vol. 57, no. 12, pp 2882-2894, December 2009. [pdf]
  • Sinangil M. E., N. Verma, A. P. Chandrakasan, "A Reconfigurable 8T Ultra-Dynamic Voltage Scalable (U-DVS) SRAM in 65nm CMOS," IEEE Journal of Solid-State Circuits, vol. 44, no. 11, pp. 3163-3173, November 2009. [pdf]
  • Daly D. C., A. P. Chandrakasan, "A 6-bit, 0.2V to 0.9V Highly Digital Flash ADC With Comparator Redundancy," IEEE Journal of Solid-State Circuits, vol. 44, no. 11, pp. 3030-3038, November 2009. [pdf]
  • Sze, V., D. F. Finchelstein, M. E. Sinangil, A. P. Chandrakasan, "A 0.7-V 1.8-mW H.264/AVC 720p Video Decoder," IEEE Journal of Solid-State Circuits, vol. 44, no. 11, pp. 2943-2956, November 2009. [pdf]
  • Finchelstein, D. F., V. Sze, A. P. Chandrakasan, "Multi-Core Processing and Efficient On-Chip Caching for H.264 and Future Video Decoders," IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), vol. 19, no. 11, pp. 1704-1713, November 2009. [pdf]
  • Mercier, P. P., D. C. Daly, A. P. Chandrakasan, "An Energy-Efficient All-Digital UWB Transmitter Employing Dual Capacitively-Coupled Pulse-Shaping Drivers," IEEE Journal of Solid-State Circuits, vol. 44, no. 6, pp. 1679-1688, June 2009. [pdf]
  • Drego, N., A. P. Chandrakasan, D. Boning, "Lack of Spatial correlation in MOSFET Threshold Voltage Variation and Implications for Voltage Scaling," IEEE Transactions on Semiconductor Manufacturing, vol. 22, no. 2, pp. 245-255, May 2009. [pdf]
  • Bohorquez, J. L., A. P. Chandrakasan, J. L. Dawson, "A 350uW CMOS MSK Transmitter and 400uW OOK Super-Regenerative Receiver for Medical Implant Communications," IEEE Journal of Solid-State Circuits, vol. 44, no. 4, pp. 1248-1259, April 2009. [pdf]
  • Chandrakasan, A. P., F. S. Lee, D. D. Wentzloff, V. Sze, B. P. Ginsburg, P. P. Mercier, D. C. Daly, R. Blazquez, "Low-Power Impulse UWB Architectures and Circuits," Proceedings of the IEEE, vol. 97, no. 2, pp. 332-352, February 2009. [pdf]
  • Cho, T. S., K.-J. Lee, J. Kong, and A. P. Chandrakasan, "A 32-uW 1.83-kS/s Carbon Nanotube Chemical Sensor System," IEEE Journal of Solid-State Circuits, vol. 44, no. 2, pp. 659-669, February 2009. [pdf]
  • Verma, N., and A. Chandrakasan, "A High-Density 45nm SRAM Using Small-Signal Non-Strobed Regenerative Sensing," IEEE Journal of Solid-State Circuits, vol. 44, no. 1, pp. 163-173, January 2009. [pdf]
  • Kwong, J., Y. K. Ramadass, N. Verma, and A. Chandrakasan, "A 65nm Sub-Vt Microcontroller with Integrated SRAM and Switched Capacitor DC-DC Converter," IEEE Journal of Solid-State Circuits, vol. 44, no. 1, pp. 115-126, January 2009. [pdf]

2008

  • Ginsburg, B. P., and A. Chandrakasan, "Highly Interleaved 5-bit, 250-MSample/s, 1.2mW ADC with Redundant Channels in 65nm CMOS,"IEEE Journal of Solid-State Circuits, vol. 43, no. 12, pp. 2641-2650, December 2008. [pdf]
  • Schurgers, C., and A. Chandrakasan, "Traceback-Based Optimizations for Maximum a Posteriori Decoding Algorithms," Journal of Signal Processing Systems, vol. 53, no. 3, pp. 231-241, December 2008. [link]
  • Chandrakasan, A. P., N. Verma, D. C. Daly, "Ultralow-Power Electronics for Biomedical Applications," Annual Review of Biomedical Engineering, August 2008. [link]
  • Verma, N., A. P. Chandrakasan, "A 256 kb 65 nm 8T Subthreshold SRAM Employing Sense-Amplifier Redundancy," IEEE Journal of Solid-State Circuits, pp. 141-149, January 2008. [pdf]
  • Ramadass, Y. K., A. P. Chandrakasan, "Minimum Energy Tracking Loop With Embedded DC-DC Converter Enabling Ultra-Low-Voltage Operation Down to 250 mV in 65 nm CMOS," IEEE Journal of Solid-State Circuits, pp. 256-265, January 2008. [pdf]
  • Verma, N., J. Kwong, A. P. Chandrakasan, "Nanometer MOSFET Variation in Minimum Energy Subthreshold Circuits," IEEE Transactions on Electron Devices, pp. 163-174, January 2008. [pdf]

2007

  • Lee, F. S., A. P. Chandrakasan, "A 2.5 nJ/bit 0.65 V Pulsed UWB Receiver in 90 nm CMOS," IEEE Journal of Solid-State Circuits, vol. 42, no. 12, pp. 2851-2859, Dec. 2007. [pdf]
  • Verma, N., A. P. Chandrakasan, "An Ultra Low Energy 12-bit Rate-Resolution Scalable SAR ADC for Wireless Sensor Nodes", IEEE Journal of Solid-State Circuits, vol. 42, no. 6, pp. 1196-1205, June 2007. [pdf]
  • Daly, D. C., A. P. Chandrakasan, "An Energy-Efficient OOK Transceiver for Wireless Sensor Networks," IEEE Journal of Solid-State Circuits, vol. 42, no. 5, pp. 1003-1011, May 2007. [pdf]
  • Ginsburg, B. P., A. P. Chandrakasan, "500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC," IEEE Journal of Solid-State Circuits, vol. 42, no. 4, pp. 739-747, April 2007. [pdf]
  • Calhoun, B. H., A. P. Chandrakasan, "A 256kb 65nm Sub-threshold SRAM Design for Ultra-Low Voltage Operation", IEEE Journal of Solid-State Circuits, vol. 42, no. 3, pp. 680-688, March 2007. [pdf]
  • Ginsburg, B. P., A. P. Chandrakasan, "Dual Time-Interleaved Successive Approximation Register ADCs for an Ultra-Wideband Receiver," IEEE Journal of Solid-State Circuits, vol. 42, no. 2, pp. 247-257, February 2007. [pdf]

2006

  • Calhoun, B. H., A. P. Chandrakasan, "Static Noise Margin Variation for Sub-threshold SRAM in 65nm CMOS," IEEE Journal of Solid-State Circuits, vol. 41, no. 7, pp. 1673-1679, July 2006. [pdf]
  • Lee, F. S., A. P. Chandrakasan, "A BiCMOS Ultra-Wideband 3.1-10.6GHz Front-End," IEEE Journal of Solid-State Circuits, pp. 1856-1866, August 2006. [pdf]
  • Wentzloff, D. D., A. P. Chandrakasan, "Gaussian Pulse Generators for Subbanded Ultra-Wideband Transmitters," IEEE Transactions on Microwave Theory and Techniques, Vol. 54, No. 4, pp. 1647-1654, April 2006. [pdf]
  • Calhoun, B. H., A. P. Chandrakasan, "Ultra-Dynamic Voltage Scaling (UDVS) Using Sub-Threshold Operation and Local Voltage Dithering," IEEE Journal of Solid-State Circuits, Vol. 41, No. 1, pp. 238-245, January 2006. [pdf]

2005

  • Blazquez, R., P. P. Newaskar, F. S. Lee, A. P. Chandrakasan, "A Baseband Processor for Impulse Ultra-Wideband Communications," IEEE Journal of Solid-State Circuits, vol. 40, no. 9, pp. 1821-1828, September 2005. [pdf]
  • Calhoun, B. H., A. Wang, A. Chandrakasan, "Modeling and Sizing for Minimum Energy Operation in Subthreshold Circuits," IEEE Journal of Solid-State Circuits, vol. 40, no. 9, pp. 1778-1786, September 2005. [pdf]
  • Wentzloff, D. D., R. Blazquez, F. S. Lee, B. P. Ginsburg, J. Powell, A. P. Chandrakasan, "System Design Considerations for Ultra-Wideband Communication," IEEE Communications Magazine, vol. 43, no. 8, pp. 114-121, August 2005. [pdf]
  • Amirtharajah, R., J. Collier, J. Siebert, B. Zhou, A. Chandrakasan, "DSPs for energy harvesting sensors: applications and architectures," IEEE Pervasive Computing, vol. 4, no. 3, pp. 72-79, July-Sept. 2005.
  • Calhoun, B. H., D. C. Daly, N. Verma, D. Finchelstein, D. D. Wentzloff, A. Wang, S.-H. Cho, and A. P. Chandrakasan, "Design Considerations for Ultra-low Energy Wireless Microsensor Nodes," IEEE Transactions on Computers. pp. 727-749, June 2005. [pdf]
  • Wang, A., A. P. Chandrakasan, "A 180-mV Subthreshold FFT Processor Using a Minimum Energy Design Methodology," IEEE Journal of Solid-State Circuits, vol. 40, no. 1, pp. 310-319, January 2005. [pdf]

2004

  • Min, R., A. P. Chandrakasan, "Top Five Myths about the Energy Consumption of Wireless Communication", ACM Sigmobile Mobile Communication and Communications Review (MC2R), to be published in vol. 6, no. 4. [link]
  • Calhoun, B., A. P. Chandrakasan, "Standby Power Reduction Using Dynamic Voltage Scaling and Canary Flip-Flop Structures," IEEE Journal of Solid-State Circuits, vol. 39, no. 9, pp. 1504-1511, September 2004. [pdf]
  • Shih, E., S. Cho, F. S. Lee, B. H. Calhoun, A. P. Chandrakasan, "Design Considerations for Energy-Efficient Radios in Wireless Microsensor Networks," The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology, vol. 37, no. 1, pp. 77-94, May 2004.
  • Calhoun, B., F. Honore, A. P. Chandrakasan, "A Leakage Reduction Methodology for Distributed MTCMOS," IEEE Journal of Solid-State Circuits, pp. 818-826, May 2004. [pdf]
  • Cho, S., A. P. Chandrakasan, "A 6.5GHz Energy-Efficient BFSK Modulator for Wireless Sensor Applications," IEEE Journal of Solid-State Circuits, pp. 731-739, May 2004. [pdf]
  • Das, S., A. Chandrakasan, and R. Reif. "Calibration of Rent's-Rule Models for Three-Dimensional Integrated Circuits," IEEE Trans. on VLSI Systems, pp. 359-366, April 2004. [pdf]
  • Narendra, S., V. De, S. Borkar, D. Antoniadis, A. P. Chandrakasan, "Full-Chip Subthreshold Leakage Power Prediction and Reduction Techniques for Sub-0.18um CMOS," IEEE Journal Of Solid-State Circuits, pp. 501-510, March 2004. [pdf]
  • Amirtharajah, R., A. P. Chandrakasan, "A Micropower Programmable DSP Using Approximate Signal Processing Based on Distributed Arithmetic," IEEE Journal of Solid-State Circuits, pp. 337-347, February 2004. [pdf]

2003

  • Sinha, A., A. P. Chandrakasan, "Instruction Level and Operating System Profiling of Energy Exposed Software," IEEE Transactions on VLSI Systems, pp. 1044-1057, December 2003. [pdf]
  • Sotiriadis, P., A. P. Chandrakasan, "Bus Energy Reduction by Transition Pattern Coding Using a Detailed Deep Submicrometer Bus Model," IEEE Transactions on Circuits and Systems, pp. 1280-1295, October 2003. [pdf]
  • Sotiriadis, P., V. Tarokh, A. P. Chandrakasan, "Energy Reduction in VLSI Computation Modules: An Information Theoretic Approach," IEEE Transactions on Information Theory, pp. 790-808, April 2003. [pdf]
  • Rahman, A., S. Das, A. P. Chandrakasan, R. Reif, "Wiring Requirement and Three-Dimensional Integration Technology for Field Programmable Gate Arrays," IEEE Transactions on VLSI Systems, pp. 44-54, February 2003. [pdf]

2002

  • Sotiriadis, P., A. P. Chandrakasan, "Power Estimation and Power Optimal Communication in Deep Sub-micron Busses: Analytical Models and Statistical Measures," Journal of Circuits, Systems and Computers, World Scientific Publishing Company (special issue on Power Modeling, Estimation, and Optimization in VLSI Systems), pp. 637-658, December 2002.
  • Kao, J. M. Miyazaki, A. P. Chandrakasan, "A 175mV Multiply-Accumulate DSP Core Using an Adaptive Supply Voltage and Body Bias (ASB) Architecture," IEEE Journal of Solid-State Circuits, pp. 1545-1554, November 2002. [pdf]
  • Tschanz, J., James Kao, Siva Narendra, Raj Nair, Dimitri Antoniadis, Anantha Chandrakasan, and Vivek De, "Adaptive Body Bias for Reducing Impacts of Die-to-Die and Within-Die Parameter Variations on Microprocessor Frequency and Leakage," IEEE Journal of Solid-State Circuits, pp. 1396-1402, November 2002. [pdf]
  • Heinzelman, W., A. P. Chandrakasan, H. Balakrishnan, "An Application-Specific Protocol Architecture for Wireless Microsensor," IEEE Transactions on Wireless Networking, pp. 660-670, October 2002. [pdf]
  • Min, R., M. Bhardwaj, S. Cho, N. Ickes, E. Shih, A. Sinha, A. Wang, A. P. Chandrakasan, "Energy-Centric Enabling Technologies for Wireless Sensor Networks," IEEE Communications Magazine, pp. 28-39, August 2002. [pdf]
  • Wang, A., A. P. Chandrakasan, "Energy-Efficient DSP for Wireless Sensor Networks," IEEE Signal Processing Magazine, pp. 68-78, July 2002. [pdf]
  • Sotiriadis, P., A.P. Chandrakasan, "A Bus Energy Model for Deep Sub-micron Technology," IEEE Transactions on VLSI Systems, pp. 341-350, June 2002. [pdf]
  • Sinha, A., A. Wang, A.P. Chandrakasan,"Energy Scalable System Design," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 135-145, April 2002. [pdf]

2001

  • Baradwaj, M., R. Min, A. P. Chandrakasan, "Quantifying and Enhancing Power -Awareness for VLSI Systems," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 757-772, December 2001. [pdf]
  • Wang, A., Heinzelman, W., A. P. Chandrakasan, "Energy-Scalable Protocols for Battery-Operated Microsensor Networks," Kluwer Journal of VLSI Signal Processing, pp. 223-239, November 2001.
  • Goodman, J., A. P. Chandrakasan, "An energy-efficient reconfigurable public-key cryptography processor," IEEE Journal of Solid-State Circuits, pp. 1808-1820, November 2001. [pdf]
  • Sinha, A., A. P. Chandrakasan, "Dynamic Power Management in Wireless Sensor Networks," IEEE Design and Test of Computers, pp. 62-76, March-April 2001. [pdf]
  • Meninger, S., J. Mur-Miranda, R. Amirtharajah, A. Chandrakasan, J. Lang, "Vibration-to-Electric Energy Conversion," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 64-76, February 2001. [pdf]

2000

  • Gutnik, V., A. P. Chandrakasan, "Active GHz Clock Network Using Distributed PLLs," IEEE Journal of Solid-State Circuits, pp. 1553-1560, November 2000. [pdf]
  • Kao, J., A. P. Chandrakasan, "Dual-Threshold Techniques for Low-Power Digital Circuits," IEEE Journal of Solid-State Circuits, pp. 1009-1018, July 2000. [pdf]
  • Dancy, A. R. Amirtharajah, and A. P. Chandrakasan, "High Efficiency Multiple Output DC-DC Conversion for Low-Voltage Systems," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, pp. 252-263, June 2000. [pdf]
  • Xanthopoulos, T., A. P. Chandrakasan, "A Low-Power DCT Core Using Adaptive Bitwidth and Arithmetic Activity Exploiting Signal Correlations and Quantization," IEEE Journal of Solid-State Circuits, pp. 740-750, May 2000. [pdf]
  • Simon, T. A.P. Chandrakasan, "An Ultra Low Power Adaptive Wavelet Video Encoder with Integrated Memory," IEEE Journal of Solid-State Circuits, pp.572-582, April 2000. [pdf]

1999

  • Cho, S., T. Xanthopoulos, A. P. Chandrakasan, "A Low Power Variable Length Decoder for MPEG-2 Based on Non-Uniform Fine Grain Table Partitioning," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 249-257, June 1999. [pdf]
  • Xanthopoulos, T., A. P. Chandrakasan, "A Low-Power IDCT Macrocell for MPEG2 MP@ML Exploiting Data Distribution Properties for Minimal Activity," IEEE Journal of Solid State Circuits, pp. 693-703, April 1999. [pdf]

1998

  • Goodman, J., A. P. Dancy, A. P. Chandrakasan, "An Energy/Security Scalable Encryption Processor Using an Embedded Variable Voltage DC/DC Converter," IEEE Journal of Solid-State Circuits, pp. 1799-1809, November 1998. [pdf]
  • Amirtharajah, R., A. P. Chandrakasan, "Self-Powered Signal Processing Using Vibration Based Power Generation," IEEE Journal of Solid-State Circuits, pp. 687-695, May 1998. [pdf]
  • Hadjiyiannis, G., A. P. Chandrakasan, S. Devadas, "A Protocol for Low Power, Low Bandwidth Remote Terminals," ACM Wireless Networks, pp.3-15, Volume 4, January 1998.
  • Goodman. J., A. P. Chandrakasan, "Low Power Scalable Encryption for Wireless Systems," ACM Wireless Networks, pp. 55-70, Volume 4, January 1998.

1997

  • Gutnik, V., A.P. Chandrakasan, "Embedded Power Supply for Low-Power DSP," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 425-435, Dec. 1997. [pdf]
  • Rabiner, W., and A. P. Chandrakasan, "Network Driven Motion Estimation for Portable Video Terminals," IEEE Transactions on Circuits and Systems for Video Technology, pp. 644-653, August 1997. [pdf]
  • Yang, I., C. Vieri, A. P. Chandrakasan, D. Antoniadis, "Back-gated CMOS on SOIAS For Dynamic Threshold Voltage Control," IEEE Transactions of Electron Devices, pp. 822-831, May 1997. (IEEE Electron Devices Society's Paul Rappaport Award for the Best Paper in an EDS publication during 1997) [pdf]
  • Nawab, H., A. Oppenheim, A. P. Chandrakasan, J. Ludwig, J. Winograd, "Approximate Signal Processing," Kluwer Journal of VLSI Signal Processing, pp. 177-200, January 1997.

1996

  • Srivastava, M., A. P. Chandrakasan, and R.W. Brodersen, "Predictive System Shutdown and Other Architectural Techniques for Energy Efficient Programmable Computation," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 42-55, March 1996. [pdf]
  • Ludwig, J. H. Nawab, and A. P. Chandrakasan, "Low Power Digital Filtering Using Approximate Processing," IEEE Journal of Solid-State Circuits, pp. 395-400, March 1996. [pdf]
  • Potkonjak, M., M. Srivastava, and A. P. Chandrakasan, "Multiple Constant Multiplications: Efficient and Versatile Framework and Algorithms for Exploring Common Subexpression Elimination," IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, pp. 151-165, February 1996. [pdf]

1995

  • Chandrakasan, A. P. and R. W. Brodersen, "Minimizing Power Consumption in Digital CMOS Circuits," Proceedings of the IEEE, pp. 498-523, April 1995. [pdf]
  • Chandrakasan, A. P., R. Mehra, M. Potkonjak, J. Rabaey, and R. W. Brodersen, "Optimizing Power Using Transformations," IEEE Transaction on Computer Aided Design of Integrated Circuits and Systems, pp. 13-32, January 1995. [pdf]

1994

  • Chandrakasan, A. P., A. Burstein, and R. W. Brodersen, "A Low-power Chipset for a Portable Multimedia I/O Terminal," IEEE Journal of Solid-State Circuits, pp. 1415-1428, December 1994. [pdf]

1992

  • Sheng, S., A. P. Chandrakasan, and R. W. Brodersen, "A Portable Multimedia Terminal," IEEE Communications Magazine, pp. 64-75, December 1992. [pdf]
  • Chandrakasan, A. P., S. Sheng, and R. W. Brodersen, "Low-power Digital CMOS Design," IEEE Journal of Solid State Circuits, pp. 473-484, April 1992. [pdf]