MIT Sub-Threshold Circuits Group @ MTL
Publications

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Journal Papers

2009

  • Joyce Kwong, Yogesh K. Ramadass, Naveen Verma, Anantha P. Chandrakasan, "A 65 nm Sub-Vt Microcontroller With Integrated SRAM and Switched Capacitor DC-DC Converter," IEEE Journal of Solid-State Circuits, vol. 44, no. 1, pp. 115-126, January 2009. [ paper PDF ]

2008

  • Naveen Verma, Anantha P. Chandrakasan, "A 256 kb 65 nm 8T Subthreshold SRAM Employing Sense-Amplifier Redundancy," IEEE Journal of Solid-State Circuits, pp. 141-149, January 2008. [ paper PDF ]

  • Yogesh K. Ramadass, Anantha P. Chandrakasan, "Minimum Energy Tracking Loop With Embedded DC-DC Converter Enabling Ultra-Low-Voltage Operation Down to 250 mV in 65 nm CMOS," IEEE Journal of Solid-State Circuits, pp. 256-265, January 2008. [ paper PDF ]

  • Naveen Verma, Joyce Kwong, Anantha P. Chandrakasan, "Nanometer MOSFET Variation in Minimum Energy Subthreshold Circuits," IEEE Transactions on Electron Devices, pp. 163-174, January 2008. [ paper PDF ]

2007

  • Benton Highsmith Calhoun, Anantha P. Chandrakasan, "A 256-kb 65-nm Sub-threshold SRAM Design for Ultra-Low-Voltage Operation," IEEE Journal of Solid-State Circuits, vol. 42, no. 3, pp. 680-688, March 2007. [ paper PDF ]

2006

  • Benton H. Calhoun, Anantha P. Chandrakasan, "Static Noise Margin Variation for Sub-threshold SRAM in 65nm CMOS," IEEE Journal of Solid-State Circuits, vol. 41, no. 7, pp. 1673-1679, July 2006. [ paper PDF ]

  • Benton H. Calhoun, Anantha P. Chandrakasan, "Ultra-Dynamic Voltage Scaling (UDVS) Using Sub-Threshold Operation and Local Voltage Dithering," IEEE Journal of Solid-State Circuits, vol. 41, no. 1, pp. 238-245, January 2006. [ paper PDF ]

2005

  • Benton H. Calhoun, Alice Wang, Anantha P. Chandrakasan, "Modeling and Sizing for Minimum Energy Operation in Sub-threshold Circuits," IEEE Journal of Solid-State Circuits, vol. 40, no. 9, pp. 1778-1786, September 2005. [ paper PDF ]

  • Alice Wang, Anantha P. Chandrakasan, "A 180-mV Subthreshold FFT Processor Using a Minimum Energy Design Methodology," IEEE Journal of Solid-State Circuits, vol. 40, no. 1, pp. 310-319, January 2005. [ paper PDF ]

2004

  • Benton H. Calhoun, Anantha P. Chandrakasan, "Standby Power Reduction Using Dynamic Voltage Scaling and Canary Flip-Flop Structures," IEEE Journal of Solid-State Circuits, vol. 39, no.9, pp. 1504-1511, September 2004. [ paper PDF ]

Conference Papers and Presentations

2008

  • Mahmut E. Sinangil, Naveen Verma, Anantha P. Chandrakasan, "A reconfigurable 65nm SRAM achieving voltage scalability from 0.25-1.2V and performance scalability from 20kHz-200MHz," European Solid-State Circuits Conference (ESSCIRC), pp. 282-285, Sept. 2008. [ paper PDF ]

  • Anantha P. Chandrakasan, Denis C. Daly, Joyce Kwong, Yogesh K. Ramadass, "Next Generation Micro-power Systems," IEEE Symposium on VLSI Circuits, pp. 2-5, June 2008. [ paper PDF ]

  • J. Kwong, Y. Ramadass, N. Verma, M. Koesler, K. Huber, H. Moormann, A. Chandrakasan, "A 65nm Sub-Vt Microcontroller with Integrated SRAM and Switched-Capacitor DC-DC Converter," IEEE International Solid-State Circuits Conference (ISSCC), pp. 318-319, February 2008. [ paper PDF | slides PDF ]

2007

  • Vivienne Sze, Anantha P. Chandrakasan, "A 0.4-V UWB Baseband Processor," IEEE International Symposium Low Power Electronics and Design, pp. 262-267, August 2007. [ paper PDF | slides PDF ]

  • Alice Wang, Benton H. Calhoun, Naveen Verma, Joyce Kwong, Anantha P. Chandrakasan, "Ultra-Dynamic Voltage Scaling for Energy Starved Electronics," Government Microcircuit Applications & Critical Technology Conference (GOMACTech), pp. 451-454, March 2007.

  • Yogesh Ramadass, Anantha P. Chandrakasan, "Minimum Energy Tracking Loop with Embedded DC-DC Converter Delivering Voltages Down to 250mV in 65nm CMOS," IEEE International Solid-State Circuits Conference (ISSCC) , pp. 64-65, February 2007. [ paper PDF | slides PDF ]

  • Naveen Verma, Anantha P. Chandrakasan, "A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy," IEEE International Solid-State Circuits Conference (ISSCC) , pp. 328-329, February 2007. [ paper PDF | slides PDF ]

2006

  • Joyce Kwong, Anantha P. Chandrakasan, "Variation-Driven Device Sizing for Minimum Energy Sub-threshold Circuits," International Symposium on Low Power Electronics and Design (ISLPED), pp. 8-13, October 2006. [ paper PDF | slides PDF ]

  • Vivienne Sze, Raul Blázquez, Manish Bhardwaj, Anantha Chandrakasan, "An Energy Efficient Sub-Threshold Baseband Processor Architecture For Pulsed Ultra-Wideband Communications," IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), pp. (III) 908-911, May 2006. [ paper PDF | slides PDF ]

  • Anantha P. Chandrakasan, Naveen Verma, Joyce Kwong, Denis Daly, Nathan Ickes, Daniel Finchelstein, "Micropower Wireless Sensors," Presented at NSTI Nanotech , May 7-11, 2006. vol 3, pp. 459-462

  • Benton H. Calhoun, Anantha P. Chandrakasan, "A 256kb Sub-threshold SRAM in 65nm CMOS," IEEE International Solid State Circuits Conference (ISSCC), pp. 628-629, February 2006. [ paper PDF | slides PDF ]

2005

  • Benton H. Calhoun, Anantha P. Chandrakasan, "Analyzing Static Noise Margin for Sub-threshold SRAM in 65nm CMOS," IEEE European Solid State Circuits Conference (ESSCIRC), pp. 363-366, September 2005. [ paper PDF | slides PDF ]

  • Benton H. Calhoun, Anantha P. Chandrakasan, "Ultra-Dynamic Voltage Scaling Using Sub-threshold Operation and Local Voltage Dithering in 90nm CMOS," IEEE International Solid State Circuits Conference (ISSCC), pp. 300-301, February 2005. [ paper PDF | slides PDF ]

2004

  • Benton H. Calhoun, Alice Wang, Anantha P. Chandrakasan, "Device Sizing for Minimum Energy Operation in Subthreshold Circuits," IEEE Custom Integrated Circuits Conference (CICC), pp. 95-98, October 2004. [ paper PDF | slides PDF ]

  • Benton H. Calhoun, Anantha P. Chandrakasan, "Characterizing and Modeling Minimum Energy Operation for Subthreshold Circuits," International Symposium on Low Power Electronics and Design (ISLPED), pp. 90-95, August 2004. [ paper PDF | slides PDF ]

  • Alice Wang, Anantha P. Chandrakasan, "A 180mV FFT Processor Using Subthreshold Circuit Techniques," IEEE International Solid-State Circuits Conference (ISSCC), pp. 292-293, February 2004. [ paper PDF | slides PDF ]

2003

  • Benton H. Calhoun, Anantha P. Chandrakasan, "Standby Voltage Scaling for Reduced Power," IEEE Custom Integrated Circuits Conference (CICC), pp. 639-642, October 2003. [ paper PDF ]

2002

  • Alice Wang, Anantha P. Chandrakasan, Stephen V. Kosonocky, "Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits," IEEE Computer Society Annual Symposium on VLSI, pp. 5-9, April 2002. [ paper PDF ]

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