µAMPS Research

Research - Overview

µAMPS-I and µAMPS-II

Wireless sensor networks from off-the-shelf towards fully integrated systems on chip.

In the µAMPS project at MIT, we explore a whole range of challenging issues in design and implementation of wireless sensor networks. These networks present us with a set of unique constraints that are unlike those encountered in traditional computer networks. Two key elements drive our µAMPS project:

To achieve a satisfactory lifetime, an extreme focus needs to be placed on energy efficiency, both at the level of the individual nodes and of the entire network.
Unattended operation under hard to control conditions, requires intelligence that is pushed far into the network, allowing self-configuration, reconfigurability and flexibilty.

Fig 1.: Time line

We strongly believe that these goals can only be met through a judicious integration of the entire system, tailoring each level in the system hierarchy to the specific capabilities of the layer below. Such approach to total integration has lead us to a bottom-up design methodology, building each component based on detailed knowledge of the platform below.

A first step and crucial step towards building a wireless sensor network, is developing the hardware satisfying the goals of energy efficiency and flexibility. To this end, we have created the µAMPS version-1 node, implemented with COTS components, which in turn has fueled interesting ideas in link-layer protocols. As a next step in building energy-agile hardware, we have embarked on the design of the µAMPS version-2 node. This node will have two dedicated ASICs, one for the digital processing and one for the analog/RF part of the radio. To achieve the desired energy efficiency and reconfigurability, we are working on novel system architectures and design techniques. As an intermediate step, the digital hardware will be implemented on an FPGA. Fig. 1 illustrates the project time line.

µAMPS-I:

Testbed with a voltage scalable processor, adaptive transmit power, flexible error coding and aggressive subsystem shutdown.

µAMPS-II:

Highly integrated sensor node comprised of a digital and an analog/RF ASIC. As a verification platform, an intermediate FPGA implementation of the digital part will interface with the version-1 radio system. The µAMPS-II will be able to operate as a low-end stand-alone node (e.g. as a trip-wire), a fully functional node for middle-end sensor networks, or serve as a companion component in a more powerful sensor systems (such as in the DARPA PASTA project).

Fig. 2: Acoustic beamforming setup

Fig. 3: Java GUI for acoustic beamforming