Skip to content

Energy-Efficient Circuits and Systems

The MIT Energy-Efficient Circuits and Systems Group led by Prof. Anantha Chandrakasan is involved with the design and implementation of various integrated systems ranging from ultra low-power wireless sensors and multimedia devices to high performance processors. Research spans across multiple levels of abstraction ranging from innovative new process technologies and circuit styles to architectures, algorithms, and software technologies. A key focus of this group is developing energy efficient integrated solutions for battery operated systems.

Current Research Areas

Security for Internet of Things (IoT)

The sheer number and diversity of IoT devices, along with their limited resources, makes IoT security a challenge quite different from securing traditional computing systems. As a circuits and systems group, we have been working on the design of low-power cryptographic hardware accelerators, wireless authentication tags and energy-efficient security protocols. Apart from the traditional approach, we are also exploring novel applications of security like speech authentication, physical layer security in RF transceivers, and authentication in the analog domain.

Research Team

Rabia Tugce Yazicigil, Chiraag Juvekar, Utsav Banerjee, Mohamed Radwan Abdelhamid, Saurav Maji, Vipasha Mittal, Maitreyi Ashok

Related Recent Publications

  • Maji S., U. Benerjee, S. H. Fuller, A. P. Chandrakasan, "A Threshold-Implementation-Based Neural-Network Accelerator Securing Model Parameters and Inputs Against Power Side-Channel Attacks," IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2022. [link]
  • Maji S., U. Banerjee, S. H. Fuller, R. T. Yazicigil, A. P. Chandrakasan, "Securing Embedded Medical Devices using Dual-Factor Authentication," IEEE International Symposium on Computer-Based Medical Systems (CBMS), Jun. 2021. [link]
  • Banerjee U., A. P. Chandrakasan, "A Low-Power Elliptic Curve Pairing Crypto-Processor for Secure Embedded Blockchain and Functional Encryption," IEEE Custom Integrated Circuits Conference (CICC), Apr. 2021. [link]
  • Maji S., U. Banerjee, A. P. Chandrakasan, "Leaky Nets: Recovering Embedded Neural Network Models and Inputs through Simple Power and Timing Side-Channels - Attacks and Defenses," IEEE Internet of Things Journal, Feb. 2021. [link]
  • Jeong T., A. P. Chandrakasan, H. S. Lee, "S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance," CICC 2020. [link]
  • Maji S., U. Banerjee, S. H. Fuller, M. R. Abdelhamid, P. M. Nadeau, R. T. Yazicigil, A. P. Chandrakasan, "A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices," CICC 2020. [link]
  • Ibrahim M. I., M. I. W. Khan, C. S. Juvekar, W. Jung, R. T. Yazicigil, A. P. Chandrakasan, R. Han, "THzID: A 1.6mm2 Package-Less Cryptographic Identification Tag with Backscattering and Beam-Steering at 260GHz," ISSCC 2020. [link]
  • Banerjee U., T. S. Ukyab, A. P. Chandrakasan, "Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols," CHES 2019. [link]
  • Banerjee U., A. Pathak, A. P. Chandrakasan, "An Energy-Efficient Configurable Lattice Cryptography Processor for the Quantum-Secure Internet of Things," ISSCC 2019. [link]
  • Juvekar C., V. Vaikuntanathan, A. P. Chandrakasan, "GAZELLE: A Low Latency Framework for Secure Neural Network Inference," USENIX Security 2018. [link]
  • Yazicigil R. T., P. Nadeau, D. Richman, C. Juvekar, K. Vaidya, A. P. Chandrakasan, "Ultra-Fast Bit-Level Frequency-Hopping Transmitter for Securing Low-Power Wireless Devices," RFIC 2018. [link]
  • Abdelhamid M. R., A. Paidimarri, A. P. Chandrakasan, "A −80dBm BLE-compliant, FSK wake-up receiver with system and within-bit dutycycling for scalable power and latency," CICC 2018. [link]
  • Banerjee U., C. Juvekar, A. Wright, Arvind, A. P. Chandrakasan, "An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for End-to-End Security in IoT Applications," ISSCC 2018. [link]
  • Banerjee U., C. Juvekar, S. H. Fuller, A. P. Chandrakasan, "eeDTLS: Energy-Efficient Datagram Transport Layer Security for the Internet of Things," GLOBECOM 2017. [link]
  • Desai N., C. Juvekar, S. Chandak, A. P. Chandrakasan, "An Actively Detuned Wireless Power Receiver with Public Key Cryptographic Authentication and Dynamic Power Allocation," ISSCC 2017. [link]
  • Juvekar, C. S., H. M. Lee, J. Kwong, A. P. Chandrakasan, "A Keccak-based wireless authentication tag with per-query key update and power-glitch attack countermeasures," ISSCC 2016. [link]

Energy-Efficient Circuits and Systems for Multimedia Processing

Multimedia applications, such as video playback, computational photography and speech processing, are becoming increasingly pervasive on battery-operated portable multimedia devices such as smartphones and tablets. High computational complexity of such applications requires efficient hardware implementations for real-time energy-efficient processing. In our group, we have been working on the design of energy-efficient accelerators for computational photography and vision, video decoding, keyword and speech/speaker recognition and on application-specific SRAM design. We explore power reduction techniques at various design stages (algorithms, architectures and circuits) to enable efficient integration of such applications on mobile devices.

Research Team

Alex Ji, Miaorong Wang, Di-Chia Chueh, Aya Amer, Kyungmi Lee, Jongchan Woo

Related Recent Publications

  • Lee K., A. P. Chandrakasan, "Understanding the Energy vs. Adversarial Robustness Trade-Off in Deep Neural Networks," IEEE Workshop on Signal Processing Systems (SiPS), Oct. 2021. [link]
  • Brahma K., V. Kumar, A. E. Samir, A. P. Chandrakasan, Y. C. Eldar, "Efficient Binary CNN for Medical Image Segmentation", IEEE International Symposium on Biomedical Imaging (ISBI), Apr. 2021. [link]
  • Ji Z., W. Jung, J. Woo, K. Sethi, S. Lu, A. P. Chandrakasan, "CompAcc: Efficient Hardware Realization for Processing Compressed Neural Networks Using Accumulator Arrays," IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2020. [link]
  • Wang M., A. P. Chandrakasan, "Flexible Low Power CNN Accelerator for Edge Computing with Weight Tuning," A-SSCC 2019. [link]
  • Koppula S., J. Glass, A. P. Chandrakasan, "Energy-Efficient Speaker Identification with Low-Precision Networks," ICASSP 2018. [link]
  • Biswas A., A. P. Chandrakasan, "Conv-RAM: An Energy-Efficient SRAM with Embedded Convolution Computation for Low-Power CNN-Based Machine Learning Applications," ISSCC 2018. [link]
  • Tikekar M., V. Sze, A. P. Chandrakasan, "A fully-integrated energy-efficient H.265/HEVC decoder with eDRAM for wearable devices," VLSIC 2017. [link]
  • Price M., J. Glass, A. P. Chandrakasan, "A Scalable Speech Recognizer with Deep-Neural-Network Acoustic Models and Voice-Activated Power Gating," ISSCC 2017. [link]
  • Raina P., M. Tikekar, A. P. Chandrakasan, "An energy-scalable accelerator for blind image deblurring," ESSCIRC 2016. [link]
  • Biswas A., A. P. Chandrakasan, "A 0.36V 128Kb 6T SRAM with energy-efficient dynamic body-biasing and output data prediction in 28nm FDSOI," ESSCIRC 2016. [link]
  • Jeon, D., N. Ickes, P. Raina, H. C. Wang, A. P. Chandrakasan, "A 0.6V 8mW 3D vision processor for a navigation device for the visually impaired," ISSCC 2016. [link]

Platforms for Ultra-Low Power Biomedical Electronics

Our group’s approach to biomedical electronics starts with developing a deep understanding of physiological or biological processes, which leads to new insights on how to develop an energy-efficient implementation of the system. Our focus is on enabling new applications and on dramatically lowering the energy consumption for existing ones. For both, we collaborate with a number of groups on MIT campus from the brainstorming phase, through to the implementation and experimentation.

Research Team

Sirma Orguc, Harneet Khurana, Kaustav Brahma

Related Recent Publications

  • Orguc S., J. Sands, A. Sahasrabudhe, P. Anikeeva, A. P. Chandrakasan, "Modular Optoelectronic System for Wireless, Programmable Neuromodulation During Free Behavior," EMBC 2020. [link]
  • Kanik M., S. Orguc, G. Varnavides, J. Kim, T. Benavides, D. Gonzalez, T. Akintilo, C. C. Tasan, A. P. Chandrakasan, Y. Fink, P. Anikeeva, "Strain-Programmable Fiber-based Artificial Muscle," Science, 2019. [link]
  • Orguc S., H. S. Khurana, K. M. Stankovic, H. S. Lee, A. P. Chandrakasan, "EMG-based Real Time Facial Gesture Recognition for Stress Monitoring," EMBC 2018. [link]
  • Khurana H. S., A. P. Chandrakasan, H. S. Lee, "Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles," ISCAS 2018. [link]
  • Orguc S., H. S. Khurana, H. S. Lee, A. P. Chandrakasan, "0.3 V ultra-low power sensor interface for EMG," ESSCIRC 2017. [link]
  • Nadeau P., M. Mimee, S. Carim, T. K. Lu, A. P. Chandrakasan, "Nanowatt Circuit Interface to Whole-Cell Bacterial Sensors," ISSCC 2017. [link]
  • Lam B., M. Price, A. P. Chandrakasan, "An ASIC for Energy-Scalable, Low-Power Digital Ultrasound Beamforming," SiPS 2016. [link]

Energy Harvesting and Wireless Charging for Internet of Things (IoT)

Most applications for IoT require that the sensors employed in such applications be self-powered and perform both sensing and transmission of information at low power levels. Researchers working in this theme are engaged in developing full system-level solutions to applications such as machine health monitoring, acoustic energy harvesting for flight noise monitoring etc. The approach followed here is to co-design both the harvesters and the associated low-power circuits. Some of the challenges and innovative circuit-level solutions in this theme are: achieving low-voltage startup, impedance matching and frequency tuning for efficient broadband power extraction, providing regulated output voltage for the RF-circuits to transmit the information etc. The theme brings together novel devices, sensors and low-power electronics.

Research Team

Preetinder Garcha

Related Recent Publications

  • Radhakrishna U., P. Riehl, N. Desai, P. Nadeau, Y. Yang, A. Shin, J. H. Lang, A. P. Chandrakasan, "A low-power integrated power converter for an electromagnetic vibration energy harvester with 150 mV-AC cold startup, frequency tuning, and 50 Hz AC-to-DC conversion," CICC 2018. [link]
  • Garcha P., D. El-Damak, N. Desai, J. Troncoso, E. Mazotti, J. Mullenix, S. Tang, D. Trombley, D. Buss, J. Lang, A. P. Chandrakasan, "A 25 mV-startup cold start system with on-chip magnetics for thermal energy harvesting," ESSCIRC 2017. [link]
  • Desai N., C. Juvekar, S. Chandak, A. P. Chandrakasan, "An Actively Detuned Wireless Power Receiver with Public Key Cryptographic Authentication and Dynamic Power Allocation," ISSCC 2017. [link]
  • Desai N., A. P. Chandrakasan, "A ZVS resonant receiver with maximum efficiency tracking for device-to-device wireless charging," ESSCIRC 2016. [link]
  • El-Damak, D., A. P. Chandrakasan, “Solar Energy Harvesting System with Integrated Battery Management and Startup Using Single Inductor and 3.2nW Quiescent Power,” VLSIC 2015. [link]

News

Aya Amer wins the 2021 IEEE SSCS Predoctoral Achievement Award.

Chiraag Juvekar wins the 2018 MIT Best PhD Thesis Award in Electrical Engineering.

Priyanka Raina wins the ISSCC 2016 Student Research Preview (SRP) Award at ISSCC 2017.

Mehul Tikekar, Chao-Tsung Huang, Vivienne Sze and Anantha Chandrakasan's paper recognized as one of the Top 10% at ICIP 2014.

Georgios Angelopoulos, Arun Paidimarri, Anantha Chandrakasan and Muriel Médard win Best Paper Award at ICC 2013.

Professor Anantha Chandrakasan receives 2013 IEEE Donald O. Pederson Award.