Figure 1

Figure 1: Time evolution of IDlin and stress voltage (VDSstress) in a step-stress-recovery experiment in the OFF-state in GaN HEMTs. VDS is step stressed from 30 V to 150 V in 30-V steps and 5-min stress periods. A 5-min recovery period under visible light illumination follows each stress period. Trapping is evident but no permanent IDlin degradation is observed.

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