Optically transparent, wide band gap metal oxide semiconductors are a promising candidate for large area flexible electronics. Because most commercially available flexible substrates, particularly polymer substrates, cannot withstand the high temperature processing (>400°C) required for traditional silicon device fabrication, the development of new materials and devices that can be processed at low temperatures in a scalable manner is needed. Metal oxide semiconductors have been demonstrated to retain high carrier mobilities even in the disordered, amorphous state obtained when processed at near-room temperatures ^{[1] [2]} . Compared to amorphous silicon field effect transistors (FETs), which are the dominant technology used in display backplanes, metal-oxide-based FETs have been demonstrated with higher charge carrier mobilities, higher current densities, and faster response performance ^{[3] [4]} .

It has been shown both in simulation and by experiment that FET threshold voltage (V_T) can be modified simply by changing the channel layer thickness, without requiring the additional complexity of multiple channel materials or different dopings. In this project we have developed a low temperature (~100°C), scalable lithographic process for top-gate, bottom-contact amorphous metal oxide-based FETs using parylene, a room temperature-deposited CVD polymer, as gate dielectric. Figure 1 shows a micrograph of an array of FETs fabricated with different channel lengths. The baseline process was extended to enable the integration of FETs with different threshold voltages on the same substrate. The availability of FETs with different threshold voltages enables the implementation of enhancement/depletion (E/D) logic circuits that have faster speeds and smaller device areas than single-V_T topologies. Using the two-V_T lithographic process, we fabricated and characterized integrated E/D inverters and ring oscillators that operate rail-to-rail at supply voltages as low as V_DD = 3V. An example inverter characteristic is plotted in Figure 2. These results demonstrate the potential for low V_DD metal oxide-based integrated circuits fabricated in a low temperature budget, fully lithographic process for large area electronics.

1. K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, “Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors,” Nature, vol. 432, pp. 488-492, Nov. 2004.
2. J. Robertson, “Disorder and instability processes in amorphous conducting oxides,” Physica Status Solidi B-Basic Solid State Physics, vol. 245, pp. 1026-1032, June 2008.
3. R. L. Hoffman, B. J. Norris, and J. F. Wager, “ZnO-based transparent thin-film transistors,” Applied Physics Letters, vol. 82, pp. 733-735, Feb. 2003.
4. E. Fortunato, P. Barquinha, G. Goncalves, L. Pereira, and R. Martins, “High mobility and low threshold voltage transparent thin film transistors based on amorphous indium zinc oxide semiconductors,” Solid-State Electronics, vol. 52, pp. 443-448, Mar. 2008.

A near-ultraviolet (UV) sensor based on zinc oxide (ZnO) nanowires (NWs) that is sensitive to photo excitation at or below 400-nm wavelength has been fabricated and characterized. The device uses a single optical lithography step, and the NWs are grown at a low temperature from solution. ZnO is a wide direct band gap (3.37 eV) semiconductor whose absorption edge is in the near-UV range, making it an ideal near-UV photodetector. This is the first reported ZnO NW near-UV sensor that is insensitive to visible light (visible blind) and fabricated using a low temperature solution process ^[1] . At a voltage bias of 1V across the device, a 29-fold increase in current is observed in comparison to dark current when the NWs are photo excited by 400-nm light-emitting diode (LED), 8.91 µA (photo excitation current) vs. 311 nA (dark current).

The fabrication of the near-UV sensor device is based on a single optical lithography step with no processing steps that exceed 100°C. The devices are compressed of a thin ZnO film with a metal cap. The sidewall of the ZnO film within the material stack acts as a seed for lateral growth of ZnO NWs. The metal cap restricts vertical growth of the NWs and doubles as the device electrodes. The symmetric devices have multiple electrode shapes and gaps between the electrodes ranging from 1-20 µm. The horizontally grown ZnO NWs bridge the gap between the two electrodes. The wires vary in length from 0.8 to 8.4 µm and diameter from 80 to 300 nm, depending on growth time. The result is a self-aligned ZnO NW ‘visible blind’ near-UV sensor that utilizes a low temperature process and a simple one-mask optical lithography step that can be integrated on a flexible substrate.

1. M. E. Swanwick, S. M.-L. Pfaendler, A. I. Akinwande, and A. J. Flewitt, “Near-ultraviolet sensor based on horizontal low temperature solution grown zinc oxide nanowires,” presented at 2010 MRS Fall Meeting, Boston, MA, Nov. 2010.

Organic semiconductor-based devices can easily be scaled to large areas and fabricated on flexible, elastic, and non-planar surfaces at low temperatures. These properties give rise to a myriad of applications from printable and flexible circuits, displays, and solar cells to artificial skin, neurons, and other biosensors; unattainable with traditional silicon electronics technologies ^[1] .

To enable new, exciting applications, a low voltage circuit technology is being developed. The device of interest is the pentacene-based organic thin-film transistor (OTFT). Currently, pentacene shows the most promise as an organic semiconductor given its relatively high carrier mobility and chemical stability. Delocalized π-bonded electrons enable p-type semiconducting behavior in pentacene ^[1] . To realize organic semiconductor-based devices as a pervasive complement to Si CMOS devices, the electrical performance of organic semiconductor devices must improve. This requirement demands that the operating voltage must reduce and carrier mobility increase while the device maintains a high current and on-current to off-current ratio, all of which must be reproducible. Ultimately, these device parameters are related to the semiconductor, the insulator, and the semiconductor/insulator interface quality (grain size, growth modes, material phases, interface states, trapped charges, roughness, etc.).

Insulator and semiconductor engineering are being explored as a means to improve performance and illustrate the potential of this technology for large area nanoelectronics. Conventional methods of device fabrication have been used to address performance issues with limited success. In this work, initial efforts will concentrate on engineering the gate insulator by using a high dielectric constant material. Specifically, BZN (Bi_1.5Zn₁ Nb_1.5O₇) is a paraelectric pyrochlore system that boasts a high dielectric constant, low dielectric loss, and low co-firing temperature, making it a viable insulator for improving OTFT performance and enabling advanced circuit design ^[2] . The performance of this BZN compared to parylene as an insulator is illustrated in Figures 1 and 2. Later phases of this work will focus on engineering the semiconductor deposition. Enhancements to standard evaporative deposition techniques will be explored by in situ coupling of new forms of energy to control pentacene thin-film morphology and defects.

1. M. Kitamura and Y. Arakawa, “Pentacene-based organic field-effect transistors,” Journal of Physics-Condensed Matter, vol. 20, May 2008.
2. Y. Choi, I. D. Kim, H. L. Tuller, and A. I. Akinwande, “Low-voltage organic transistors and depletion-load inverters with high-K pyrochlore BZN gate dielectric on polymer substrate,” IEEE Transactions on Electron Devices, vol. 52, pp. 2819-2824, Dec. 2005.

This project aims to develop the technology for field-enabled low-power portable vacuum sources that can be made cheaply and reliably, opening the doors to exciting applications such as portable mass spectrometers and high-performance sensors for inertial navigation. Our micropump uses arrays of isolated vertically aligned carbon nanotubes (VA-CNTs) to field-ionize the background gas, that is, to quantum tunnel electrons from the outer shell of neutral gas molecules due to the presence of a very high electrostatic field near the VA-CNT tip (Figure 1). Field strength of at least 10⁸V/cm is needed to field-ionize gases ^[1] .  The ions are then implanted in a non-evaporative getter structure biased at a high negative voltage, hence obtaining vacuum. The field ionization micropump that we are developing is designed to work at pressures as high as 30 Torr.  Our fabricated field ionizer, shown in Figure 2, is composed of arrays of VA-CNTs surrounded by a ring of VA-CNTs. The central VA-CNT of each unit enhances the electric field to achieve field ionization, while the high-transparency ring increases the flux of neutral molecules to the ionization region. VA-CNTs are ideal for field ionization because of their high aspect ratio, which enables low-voltage field ionization and their inherent chemical and mechanical robustness.  Unlike electron impact ionizers ^[2] , the field enhancer of a field ionizer is biased at a higher voltage than the gate.  Therefore, the ions it creates do not stream back to the field enhancers, which results in enhanced reliability.  The getter will be biased at a lower potential with respect to the gate to attract and implant the positive ions. Current research efforts include optimization of the fabrication of the devices and experimental characterization as ionizers and pumps.

1. R. Gomer, Field Emissions and Field Ionization, New York: Springer-Verlag, Dec. 1992.
2. L.-Y. Chen and A. I. Akinwande, “Aperture-collimated double-gated silicon field emitter arrays,” IEEE Transactions on Electron Devices, vol. 54,  no. 3, pp. 601-608, Mar. 2007.

Retarding potential analyzers (RPAs) were first developed in the 1960′s.  RPAs find widespread application including characterization of near-spacecraft environments and assessment of the propulsion efficiency of plasma-based space thrusters.  In this project we are exploring the multiplexing and scaling-down limits of RPAs using micro and nanotechnology.  Miniaturized RPAs will weigh visibly less, which will reduce the cost of a nanosatellite-based mission.  Also, miniaturized RPAs will provide better diagnostics of spacecraft plasma plumes as smaller projected area will be less disruptive to plasma under observation.  In addition, batch-fabricated miniaturized RPAs can be used as part of a spacecraft “sensorial skin” that provides detailed local information of the plasma surrounding the spacecraft, particularly during re-entry, when monitoring exterior conditions is essential to ensuring safety during the mission.

An improvement of our work from the state-of-the-art RPAs is the introduction of enforced aperture alignment.  When the apertures of each successive grid are aligned, the optical transparency of the sensor increases, which should result in improved signal strength.  We recently developed a first-generation prototype of a hybrid microRPA (Figure 1).  The hybrid microRPA has micromachined electrodes and a stainless steel housing.  Internal dynamics of this type of energy analyzer, however, are more complex than simple transmission or reflection of the various ion species ^{[1] [2]} . This fact is made evident by the experimental characterization of the microRPA using a commercial thermionic ion source for mass spectrometry.  Figure 2 shows that the measured data reveal a peak in the energy distribution function around 5.4 V of retarding potential when the ionization region is at 10 V.  Therefore, the observed ion energy distribution (dotted) deviates from the expected (continuous line) by approximately 4.6 V, a shift that is constant for a wide range of ionization region potentials.  We speculate that changes in the internal dynamics due to enforced aperture alignment, sources of error in the applied voltages due to the materials selected, or a combination thereof are cause for this anomaly.  Exploration of these potential sources of error continues, as well as the manufacturing of a fully batch-microfabricated RPA sensor with housing based on 3D HV packaging technology ^{[3] [4]} .

1. C. K. Chao and S.-Y. Su, “Charged particle motion inside the retarding potential analyzer,” Physics of Plasmas, vol. 7, no. 1, pp. 101-107, Jan. 2000.
2. C. L. Enloe and J. R. Shell, 2^nd, “Optimizing the energy resolution of planar retarding potential analyzers,” Review of Scientic Instruments, vol. 63, no. 2, pp. 1788-1791, Feb. 1992.
3. L. F. Velásquez-García, A. I. Akinwande, and M. Martínez-Sánchez, “Precision hand assembly of MEMS subsystems using DRIE-patterned deflection spring structures: An example of an out-of-plane substrate assembly,” Journal of Microelectromechanical Systems, vol. 16, no. 3, pp. 598–612, 2007.
4. B. Gassend, L. F. Velásquez-García, and A. I. Akinwande, “Precision in-plane hand assembly of bulk-microfabricated components for high-voltage MEMS arrays applications,” Journal of Microelectromechanical Systems, vol. 18, no. 2, pp. 332-346, Apr. 2009.

Field Emitter Arrays (FEAs) are excellent cold cathodes, but they have not found widespread adoption in demanding device applications because of several major challenges, including spatial/temporal current variations emanating from emitter tip radius distribution and the work function fluctuation. A consequence of tip radius variation is that the sharper emitters burn out from Joule heating before duller emitters turn on, reducing the current attainable from FEAs.

Addressing these challenges, groups have incorporated current limiting (ballasting) elements including large resistors ^[1] , diodes ^[2] , and MOSFETs ^[3] into FEAs, but none of these simultaneously provide high current, high emitter density, and high current density. Velasquez-Garcia et al. demonstrated silicon vertical ungated FETs integrated with FEAs, resulting in a Si tip on Si pillar structure ^[4] . The ungated FET has a current-source-like I-V characteristic, providing effective individual ballasting of emitters while allowing uniform and high current emission without thermal runaway ^[4] . To limit emission current, the device uses pinch-off and velocity saturation of carriers in a Si high aspect ratio channel. Their pillars have a diameter of 1 µm, height of 100 µm, and 10-µm pitch, resulting in a density of 10⁶ emitters/cm². However, a consequence of tip radius variation and ballasting is that the energy distribution of emitted electrons is larger when compared to un-ballasted FEAs.

To obtain FEAs with higher current densities, lower operating voltages, and reduced energy spread while retaining current uniformity, we expanded on previous work by scaling their tip on Si pillar structure. We developed vertical ungated FET current limiters 100 nm in diameter, 8 µm tall, and with 1-µm pitch, increasing the density to 10⁸ emitters/cm² (Figure 1). These devices demonstrate excellent current saturation of 15 pA / pillar with a linear conductance of 2.6×10^-10 S/pillar and an output conductance under 10^-13 S/pillar. The current saturates at a drain to source voltage under 0.2 V. These are the highest density, smallest diameter, and lowest operating voltage Si vertical ungated FETs ever reported.

1. P. Vaudaine and R. Meyer, “’Microtips’ fluorescent display,” IEDM Tech. Dig., 1991, pp. 197-200.
2. Y. Kobori and M. Tanaka, “Field emission cathode,” U.S. Patent 5 162 704, Feb. 5, 1992.
3. J. Itoh, T. Hirano, and S. Kanemaru, “Ultrastable emission from a metal–oxide–semiconductor field-effect transistor-structured Si emitter tip,” Applied Physics Letters, vol. 69, no. 11, pp. 1577–1578, 1996.
4. L. F. Velasquez-Garcia, S. A. Guerrera, Y. Niu, and A. I. Akinwande, “Uniform high-current cathodes using massive arrays of Si field emitters individually controlled by vertical Si ungated FETs – Part 1: Device design and simulation & Part 2: Device fabrication and characterization.” IEEE Trans. Electron Devices, vol. 58, no. 6, pp. 1775-1791, June 2011.

One of the most fundamental technical problems concerning spacecraft design is preparing the vehicle to survive the extreme conditions encountered during reentry into the Earth’s atmosphere ^[1] .  When a hypersonic vehicle travels through the atmosphere, a high-density, low-temperature plasma sheath forms around it ^[2] .  The reentry plasma sheath affects heat transfer to the spacecraft, aerodynamics, and perhaps most notably, communications.  A communications blackout is a major threat, bringing about a complete loss of RF signal strength between the reentry vehicle and the ground.  A thorough knowledge of reentry plasma sheath properties is needed to effectively develop systems capable of maintaining communications during reentry.  However, the reentry plasma sheath occurs due to processes that are not well understood.  Furthermore, the conditions of the plasma sheath rapidly change throughout reentry, which introduces additional complications.  Analytical approaches alone are not sufficient to gain a complete understanding of the plasma sheath.  Therefore, instrumentation must be developed to measure properties of the plasma sheath during reentry ^[3] .

We propose a novel approach to reentry plasma diagnostics, utilizing planar arrays of MEMS Langmuir probes to perform real-time measurements of the electron temperature and number density of the reentry plasma sheath.  The MEMS Langmuir probes, shown in Figure 1, consist of an array metallic vias in a high temperature-resistant dielectric substrate, which can be blended onto the outer surface of a reentry vehicle (i.e., as a sensorial skin).  Figure 2 shows one of the early prototypes we made as proof of concept of the device process flow.  The MEMS Langmuir probes are made using electroplated gold and an ultrasonic drilled Pyrex substrate.  The performance of the MEMS probes will be validated experimentally in laboratory plasmas similar to those encountered by spacecraft during reentry.

1. L. C. Scalabrin and I. D. Boyd, “Numerical simulation of weakly ionized hypersonic flow for reentry configurations,” in 9^th AIAA/ASME Joint Thermodynamics and Heat Transfer Conf., 2006 © AIAA. DOI: 2006-3773.
2. K. M. Lemmer, A. D. Gallimore, and T. B. Smith, “Using a helicon source to simulate atmospheric re-entry plasma densities and temperatures in a laboratory setting,” IEEE Plasma Sources Sci. Technol., vol. 18, no. 2, May 2009.
3. J. P. Rybak and R. J. Hill, “Progress in reentry communications,” IEEE Transactions on Aerospace and Electronic Systems, vol. aes-7, no. 5, pp. 879-894, Sept. 1971.