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	<title>MTL Annual Research Report 2011 &#187; James Teherani</title>
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		<title>Valence Band Offset Extraction Between Strained-Si and Strained-Ge Layers</title>
		<link>http://www-mtl.mit.edu/wpmu/ar2011/valence-band-offset-extraction-between-strained-si-and-strained-ge-layers/</link>
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		<pubDate>Tue, 28 Jun 2011 19:26:06 +0000</pubDate>
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				<category><![CDATA[Electronic Devices]]></category>
		<category><![CDATA[Dimitri Antoniadis]]></category>
		<category><![CDATA[James Teherani]]></category>
		<category><![CDATA[Judy Hoyt]]></category>

		<guid isPermaLink="false">http://www-mtl.mit.edu/wpmu/ar2011/?p=3199</guid>
		<description><![CDATA[The type-II band alignment between strained-silicon (s-Si) and strained-germanium (s-Ge) has been proposed for use in tunneling transistors due to...]]></description>
				<content:encoded><![CDATA[<div class="page-restrict-output"><p>The type-II band alignment between strained-silicon (s-Si) and strained-germanium (s-Ge) has been proposed for use in tunneling transistors due to the small effective band gap between the s-Si conduction band and s-Ge valence band<sup> [<a href="http://www-mtl.mit.edu/wpmu/ar2011/valence-band-offset-extraction-between-strained-si-and-strained-ge-layers/#footnote_0_3199" id="identifier_0_3199" class="footnote-link footnote-identifier-link" title="O. M. Nayfeh, C. N. Chleirigh, J. Hennessy, L. Gomez, J. L. Hoyt, and D. A. Antoniadis, &ldquo;Design of tunneling field-effect transistors using strained-silicon/strained-germanium Type-II staggered heterojunctions,&rdquo; IEEE Electron Device Letters, vol. 29, no. 9, pp. 1074-1077, Sep. 2008.">1</a>] </sup>. The small effective band gap may substantially increase tunneling current compared to a Ge homostructure while maintaining low off-state leakage. However, the valence band alignment between thin layers of s-Si and s-Ge on a relaxed SiGe substrate has not been experimentally extracted.</p>
<p>The experimental device structure consists of an Al<sub>2</sub>O<sub>3</sub> high-κ dielectric (~6 nm) on a Si capping layer (~ 6 nm) on s-Ge (~ 6 nm) grown pseudomorphically on a relaxed SiGe buffer (~1 µm) with 40% Ge concentration. The wafers were processed into MOS-capacitors and measured using low-frequency and quasistatic C-V techniques. The valence band offset can be extracted by fitting the simulation data to experimental C-V measurements<sup> [<a href="http://www-mtl.mit.edu/wpmu/ar2011/valence-band-offset-extraction-between-strained-si-and-strained-ge-layers/#footnote_1_3199" id="identifier_1_3199" class="footnote-link footnote-identifier-link" title="C. N. Chleirigh, C. Jungemann, J. Jung, O. O. Olubuyide, and J. L. Hoyt, &ldquo;Extraction of band offsets in strained Si/strained Si1-yGey on relaxed Si1-xGex dual-channel enhanced mobility structures,&rdquo; in Proc. Electrochemical Society: SiGe: Materials, Processing and Devices, pp. 99&ndash;109, 2005.">2</a>] </sup>. In Figure 1, the width of region II is dependent on the valence band offset and effective band gap between the s-Si and s-Ge layers.</p>
<p>Figure 2 shows the band structure and hole density as a function of position for the fabricated structure. At 0 V gate voltage, most holes near the surface of the capacitor are contained in the s-Ge quantum well. Since the s-Ge quantum well is displaced from the Al<sub>2</sub>O<sub>3</sub> surface by the s-Si layer, the effective thickness is larger and thus the measured capacitance is lower than the oxide capacitance. As a more negative bias is applied to the gate, holes begin to accumulate at the s-Si/Al<sub>2</sub>O<sub>3</sub> surface so that the total capacitance increases and approaches the oxide capacitance. The extracted valence band offset between the s-Si and s-Ge layers was 740±30 meV, which also suggests a small effective band gap.</p>

<a href='http://www-mtl.mit.edu/wpmu/ar2011/valence-band-offset-extraction-between-strained-si-and-strained-ge-layers/teherani_valence_01/' title='Figure 1'><img width="300" height="212" src="http://www-mtl.mit.edu/wpmu/ar2011/files/2011/06/teherani_valence_01-300x212.png" class="attachment-medium" alt="Figure 1" /></a>
<a href='http://www-mtl.mit.edu/wpmu/ar2011/valence-band-offset-extraction-between-strained-si-and-strained-ge-layers/teherani_valence_02/' title='Figure 2'><img width="300" height="215" src="http://www-mtl.mit.edu/wpmu/ar2011/files/2011/06/teherani_valence_02-300x215.png" class="attachment-medium" alt="Figure 2" /></a>

<ol class="footnotes"><li id="footnote_0_3199" class="footnote">O. M. Nayfeh, C. N. Chleirigh, J. Hennessy, L. Gomez, J. L. Hoyt, and D. A. Antoniadis, “Design of tunneling field-effect transistors using strained-silicon/strained-germanium Type-II staggered heterojunctions,” <em>IEEE Electron Device Letters</em>, vol. 29, no. 9, pp. 1074-1077, Sep. 2008.</li><li id="footnote_1_3199" class="footnote">C. N. Chleirigh, C. Jungemann, J. Jung, O. O. Olubuyide, and J. L. Hoyt, “Extraction of band offsets in strained Si/strained Si1-yGey on relaxed Si1-xGex dual-channel enhanced mobility structures,” in <em>Proc. Electrochemical Society: SiGe: Materials, Processing and Devices</em>, pp. 99–109, 2005.</li></ol></div>]]></content:encoded>
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