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	<title>MTL Annual Research Report 2011 &#187; Mohamed Azize</title>
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		<title>Top-down Fabrication of N-face GaN/AlGaN Nanowire HEMTs</title>
		<link>http://www-mtl.mit.edu/wpmu/ar2011/top-down-fabrication-of-n-face-ganalgan-nanowire-hemts/</link>
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		<pubDate>Tue, 05 Jul 2011 14:44:06 +0000</pubDate>
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				<category><![CDATA[Nanotechnology]]></category>
		<category><![CDATA[Mohamed Azize]]></category>
		<category><![CDATA[Tomas Palacios]]></category>

		<guid isPermaLink="false">http://www-mtl.mit.edu/wpmu/ar2011/?p=3310</guid>
		<description><![CDATA[The high-frequency performance of Ga-face AlxGa1–xN/GaN high electron mobility transistors (HEMTs) has rapidly increased in recent years, enabling use of...]]></description>
				<content:encoded><![CDATA[<div class="page-restrict-output"><p>The high-frequency performance of Ga-face Al<sub>x</sub>Ga<sub>1–x</sub>N/GaN high electron mobility transistors (HEMTs) has rapidly increased in recent years, enabling use of these devices in power amplifiers for mm-wave applications<sup> [<a href="http://www-mtl.mit.edu/wpmu/ar2011/top-down-fabrication-of-n-face-ganalgan-nanowire-hemts/#footnote_0_3310" id="identifier_0_3310" class="footnote-link footnote-identifier-link" title="J. W. Chung, W. E. Hoke, E. M. Chumbes, and T. Palacios, IEEE Electron Device Lett. vol. 31, p. 3, 2010.">1</a>] </sup>. However, this frequency performance is still far from the theoretical limit due to poor gate modulation efficiency, short channel effects and high access resistances. With their reversed polarization, N-face GaN/AlGaN transistors have a tremendous potential to improve device performance<sup> [<a href="http://www-mtl.mit.edu/wpmu/ar2011/top-down-fabrication-of-n-face-ganalgan-nanowire-hemts/#footnote_1_3310" id="identifier_1_3310" class="footnote-link footnote-identifier-link" title="S. Rajan, A. Chini, M. H. Wong, J. S. Speck, and U. K. Mishra, J. Appl. Phys., vol. 102, p. 44501, 2007.">2</a>] </sup>. At the same time, nanowire (NW)-based HEMTs could also help to overcome many of these limitations and increase the maximum frequency of nitride devices by improving the electron confinement and reducing short channel effects<sup> [<a href="http://www-mtl.mit.edu/wpmu/ar2011/top-down-fabrication-of-n-face-ganalgan-nanowire-hemts/#footnote_2_3310" id="identifier_2_3310" class="footnote-link footnote-identifier-link" title="B. Yu, Y. Yuan, J. Song and Y. Taur, IEEE Transactions on Electron Dev. vol. 56, p 2357, 2009.">3</a>] </sup>. Therefore, the combination of both N-face material and NW structures in the same device would offer new flexibility for high-frequency power amplifiers. We are developing NW-based nitride HEMTs to explore the maximum frequency performance of nitride devices<sup> [<a href="http://www-mtl.mit.edu/wpmu/ar2011/top-down-fabrication-of-n-face-ganalgan-nanowire-hemts/#footnote_2_3310" id="identifier_3_3310" class="footnote-link footnote-identifier-link" title="B. Yu, Y. Yuan, J. Song and Y. Taur, IEEE Transactions on Electron Dev. vol. 56, p 2357, 2009.">3</a>] </sup>.</p>
<p>Our starting material is a Ga-face AlGaN (~17 nm)/GaN (~25 nm) /AlGaN (~5 nm)/GaN (~1.8 mm) HEMTs grown on Si(111) substrate by metal organic vapor phase epitaxy. After growth, the Ga-face of the wafer is bonded to a carrier substrate; dry etching removes the original substrate and GaN buffer to expose the N-face of the GaN/AlGaN structure (see Figure 1). With a 5-nm-thick etch stop layer, all GaN buffer can be removed, leaving only 47 nm of AlGaN/GaN/AlGaN structure. Free-standing NW devices are fabricated in a two-step, top-down technology<sup> [<a href="http://www-mtl.mit.edu/wpmu/ar2011/top-down-fabrication-of-n-face-ganalgan-nanowire-hemts/#footnote_3_3310" id="identifier_4_3310" class="footnote-link footnote-identifier-link" title="M. Azize and T. Palacios, App. Phys. Lett., vol. 98, p. 042103, 2011.2011.">4</a>] </sup>. Standard planar transistors are first fabricated; via electron-beam lithography, arrays of lateral NWs are patterned between two Ohmic contacts. Electron cyclotron resonance reactive ion etching removes the material between adjacent NWs by using BCl<sub>3</sub> and Cl<sub>2</sub> chemistry. The etch depth is ~ 50 nm, deep enough to prevent electrical conduction between NWs. A maximum drain current of ~600 mA/mm is measured in the fabricated NW-based HEMTs (see Figure 2). This current density is ~20% higher than current in a planar N-face HEMT, used as a reference. Characterization of the high frequency performance of these nanowires is currently underway. We expect that the large carrier confinement of these devices will allow higher operating frequencies as well as linearity.<sup> [<a href="http://www-mtl.mit.edu/wpmu/ar2011/top-down-fabrication-of-n-face-ganalgan-nanowire-hemts/#footnote_4_3310" id="identifier_5_3310" class="footnote-link footnote-identifier-link" title="J. W. Chung, E. L. Piner, and T. Palacios, IEEE Electron Device Lett. vol. 30, p. 113, 2009.">5</a>] </sup></p>

<a href='http://www-mtl.mit.edu/wpmu/ar2011/top-down-fabrication-of-n-face-ganalgan-nanowire-hemts/azize_fig-1/' title='Figure 1'><img width="300" height="187" src="http://www-mtl.mit.edu/wpmu/ar2011/files/2011/07/azize_Fig-1-300x187.jpg" class="attachment-medium" alt="Figure 1" /></a>
<a href='http://www-mtl.mit.edu/wpmu/ar2011/top-down-fabrication-of-n-face-ganalgan-nanowire-hemts/azize_fig-2/' title='Figure 2'><img width="300" height="187" src="http://www-mtl.mit.edu/wpmu/ar2011/files/2011/07/azize_Fig-2-300x187.jpg" class="attachment-medium" alt="Figure 2" /></a>

<ol class="footnotes"><li id="footnote_0_3310" class="footnote">J. W. Chung, W. E. Hoke, E. M. Chumbes, and T. Palacios, <em>IEEE Electron Device Lett</em>.<strong> </strong>vol. 31, p. 3, 2010.</li><li id="footnote_1_3310" class="footnote">S. Rajan, A. Chini, M. H. Wong, J. S. Speck, and U. K. Mishra, <em>J. Appl. Phys.</em>, vol. 102, p. 44501, 2007.</li><li id="footnote_2_3310" class="footnote">B. Yu, Y. Yuan, J. Song and Y. Taur, <em>IEEE Transactions</em> <em>on Elec</em><em>tron Dev</em><strong>. </strong>vol. 56, p 2357, 2009.</li><li id="footnote_3_3310" class="footnote">M. Azize and T. Palacios, <em>App. Phys. Lett., </em>vol. 98, p. 042103, 2011.2011.</li><li id="footnote_4_3310" class="footnote">J. W. Chung, E. L. Piner,<strong> </strong>and T. Palacios, <em>IEEE Electron Device Lett.</em><strong> </strong>vol.<strong> </strong>30, p. 113, 2009.</li></ol></div>]]></content:encoded>
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