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	<title>MTL Annual Research Report 2011 &#187; Omair Saadat</title>
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		<title>Low Temperature Gate Dielectric Deposition for Recessed AlGaN/GaN MIS-HEMTs</title>
		<link>http://www-mtl.mit.edu/wpmu/ar2011/low-temperature-gate-dielectric-deposition-for-recessed-algangan-mis-hemts/</link>
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		<pubDate>Tue, 05 Jul 2011 20:40:01 +0000</pubDate>
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				<category><![CDATA[Electronic Devices]]></category>
		<category><![CDATA[Omair Saadat]]></category>
		<category><![CDATA[Tomas Palacios]]></category>

		<guid isPermaLink="false">http://www-mtl.mit.edu/wpmu/ar2011/?p=3352</guid>
		<description><![CDATA[The use of gate dielectrics in AlGaN/GaN high electron mobility transistors (MIS-HEMTs) is attracting great interest for power applications since...]]></description>
				<content:encoded><![CDATA[<div class="page-restrict-output"><p>The use of gate dielectrics in AlGaN/GaN high electron mobility transistors (MIS-HEMTs) is attracting great interest for power applications since gate dielectrics improve the I<sub>on</sub>/I<sub>off</sub> ratio and reduce gate leakage in transistors. However, gate dielectrics prevent commonly used technologies like recessed gates. By using dielectrics deposited at low temperatures, we can design a self-aligned process in which the gate is lithographically patterned, the gate is recessed, and then the dielectric is deposited before the gate metal deposition. However, it has been reported that these dielectrics are of lower quality<sup> [<a href="http://www-mtl.mit.edu/wpmu/ar2011/low-temperature-gate-dielectric-deposition-for-recessed-algangan-mis-hemts/#footnote_0_3352" id="identifier_0_3352" class="footnote-link footnote-identifier-link" title="M. D. Groner, F. H. Fabreguette, J. W. Elam, and S. M. George, &ldquo;Low-temperature Al2O3 atomic layer deposition,&rdquo; Chem Mater. vol. 16, no. 4, pp. 639-645, 2004.">1</a>] </sup><sup> [<a href="http://www-mtl.mit.edu/wpmu/ar2011/low-temperature-gate-dielectric-deposition-for-recessed-algangan-mis-hemts/#footnote_1_3352" id="identifier_1_3352" class="footnote-link footnote-identifier-link" title="D. J. Meyer, R. Bass, D. S. Katzer, D. A. Deen, S. C. Binari, K. M. Daniels, and C. R. Eddy Jr., &ldquo;Self-aligned ALD AlOx T-gate insulator for gate leakage current suppression in SiNx-passivated AlGaN/GaN HEMTs,&rdquo; Solid-State Electron., vol. 54, pp. 1098-1104, 2010.">2</a>] </sup>.  The purpose of this study is to investigate how dielectric material, deposition temperatures, and annealing conditions impact the quality of AlGaN/GaN MIS-HEMTs with low temperature gate dielectrics.</p>
<p>AlGaN/GaN/ MIS-HEMTs with HfO<sub>2</sub> and Al<sub>2</sub>O<sub>3</sub> gate dielectrics were fabricated and studied with a reference Schottky gate transistor.  These dielectrics were deposited at temperatures ranging from 80 °C to 120 °C.  Following the gate metal deposition, different samples were annealed from 400C to 600C in either nitrogen or forming gas ambient.  The best HfO<sub>2</sub> transistors had a steeper subthreshold slope (71 mV/dec) than the best Al<sub>2</sub>O<sub>3</sub> transistors (82 mV/dec) and the best Schottky gate transistors (142 mV/dec) as seen in Figure 1.   For all MIS-HEMTs, we found that annealing the transistors at 400 °C and increasing the deposition temperature improved the subthreshold slope the most.  In addition, we evaluated the I<sub>on</sub>/I<sub>off</sub> ratio of these transistors.  As seen in Figure 2, the devices with HfO<sub>2</sub> exhibited I<sub>on</sub>/I<sub>off</sub> ratios on the order of 10<sup>9</sup>, which was 4 orders higher than the best devices with Schottky gates.</p>
<p>To summarize, we show that by annealing low temperature gate oxides, low temperature MIS-HEMTs demonstrate performance better than Schottky gate transistors with respect to subthreshold slopes and I<sub>on</sub>/I<sub>off</sub> ratios.  These low temperature annealed oxides are very promising for combining fabrication technologies like submicron recessed gate transistors with gate dielectrics.</p>

<a href='http://www-mtl.mit.edu/wpmu/ar2011/low-temperature-gate-dielectric-deposition-for-recessed-algangan-mis-hemts/saadat-fig1/' title='Figure 1'><img width="300" height="208" src="http://www-mtl.mit.edu/wpmu/ar2011/files/2011/07/Saadat-Fig1-300x208.jpg" class="attachment-medium" alt="Figure 1" /></a>
<a href='http://www-mtl.mit.edu/wpmu/ar2011/low-temperature-gate-dielectric-deposition-for-recessed-algangan-mis-hemts/saadat-fig2/' title='Figure 2'><img width="300" height="247" src="http://www-mtl.mit.edu/wpmu/ar2011/files/2011/07/Saadat-Fig2-300x247.jpg" class="attachment-medium" alt="Figure 2" /></a>

<ol class="footnotes"><li id="footnote_0_3352" class="footnote">M. D. Groner, F. H. Fabreguette, J. W. Elam, and S. M. George, “Low-temperature Al<sub>2</sub>O<sub>3</sub> atomic layer deposition,” <em>Chem Mater.</em> vol. 16, no. 4, pp. 639-645, 2004.</li><li id="footnote_1_3352" class="footnote">D. J. Meyer, R. Bass, D. S. Katzer, D. A. Deen, S. C. Binari, K. M. Daniels, and C. R. Eddy Jr., “Self-aligned ALD AlO<sub>x</sub> T-gate insulator for gate leakage current suppression in SiN<sub>x</sub>-passivated AlGaN/GaN HEMTs,” <em>Solid-State Electron.</em>, vol. 54, pp. 1098-1104, 2010.</li></ol></div>]]></content:encoded>
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