Micro-batteries provide a critical component for self-powered autonomous microsystems.  Lithium-ion batteries provide relatively high energy storage capacities.  Significant improvement in energy storage capacities over current generation lithium-ion batteries is achievable by using silicon as the anode material. Silicon has the highest known Li capacity, up to 4.4 lithium atoms per silicon atom.  However, lithiation of silicon results in large volume changes that cannot be sustained in monolithic forms such as fully dense films or substrates. To employ silicon-based lithium batteries, nanostructured silicon nanowires with high surface-to-volume ratios and superior mechanical properties over bulk are being investigated ^{[1] [2]} .

We use metal-catalyzed etching (MCE) to fabricate the silicon nanowires, a process that offers low-cost, room temperature processing of silicon.  The process takes advantages of a thin, patterned metal film that catalyzes the etching of silicon when immersed in an HF solution with an oxidant such as H₂O₂.  MCE can be used to create of large (>1 cm²) arrays of perfectly ordered Si-NWs with periods down to 40 nm, diameters down to 20 nm, and aspect ratios up to 200 to 1 ^[3] .  These high-volume filling arrays are being used for studies of lithiation. Amorphous silicon-based nanowire arrays on various substrates are being explored for enhanced cyclability (Figure 1).

Figure 1: Amorphous silicon nanowires on glass using MCE ^[1] . These wires are expected to better accommodate the stresses associated with lithiation.

1. C. K. Chan, H. Peng, G. Liu, K. McIlwrath, X. F. Zhang, R. A. Huggins, and Y. Cui, “High-performance lithium battery anodes using silicon nanowires,” Nature Nanotechnology, vol. 3, pp. 31-35, 2008.
2. C. K. Chan, R. Ruffo, S. S. Hong, R. A. Huggins, and Y. Cui, “Structural and electrochemical study of the reaction of lithium with silicon nanowires,” J. of Power Sources, vol. 14, pp. 34-39, 2010.
3. S. W. Chang, V. P. Chuang, S. T. Boles, C. A. Ross, and C. V. Thompson, “Densely-packed arrays of ultrahigh-aspect-ratio silicon nanowire fabricated using block copolymer lithography and metal-assisted etching,” Adv. Funct. Mater. vol. 19, pp. 2495-2500, 2009.

Silicon nanowires (NWs) have attracted immense interest for sensing applications due to their high surface-to-volume ratio. In particular, field-effect-based chemical sensors are an attractive platform for fabricating multi-channel analysis systems capable of detecting bio-molecule concentrations and enzyme reactions. One can measure the concentrations of target analytes by taking advantage of changes in either capacitance or conductivity due to binding of chemical and biological species to the NW surface. However, most nanowire-based biochemical sensor studies employ planar field-effect transistor (FET) structures. In comparison, vertical freestanding FET structures sensors have a greater potential for ultrahigh sensitive detection because of the still larger exposed surface interaction area in high density arrays.

One solution to fabricating vertically aligned FETs is through metal-catalyzed etching (MCE) ^{[1] [2]} , a low-cost, room temperature method which enables fabrication of highly ordered Si NW arrays of large aspect ratios (Figure 1). Such structures are very promising for the detection of multiple targets in an integrated microfluidic system. Improvement in sensor sensitivity using an electrolyte-semiconductor-silicon (EIS) sensor system was found to scale with nanowire length, translating into a stronger sensor signal when compared to a planar EIS sensor (Figure 2).

1. S. W. Chang, V. P. Chuang, S. T. Boles, C. A. Ross, and C. V. Thompson, “Densely packed arrays of ultra‐high‐aspect‐ratio silicon nanowires fabricated using block‐copolymer lithography and metal‐assisted etching,” Advanced Functional Materials, vol. 19, pp. 2495-2500, Aug. 2009.
2. S. W. Chang, V. P. Chuang, S. T. Boles, and C. V. Thompson, “Metal‐catalyzed etching of vertically aligned polysilicon and amorphous silicon nanowire arrays by etching direction confinement,” Advanced Functional Materials, vol. 20, pp. 4364-4370, Dec. 2010.

Because thin films are usually unstable in the as-deposited state, at sufficiently high temperatures atomic motion will occur and lead films to dewet or agglomerate to form arrays of islands. This can occur well below the melting temperature when the films are still solid. In single-crystal films, due to anisotropy in surface energy and diffusivity, this dewetting process occurs to form regular arrays of islands. When this process is templated through pre-patterning of the film, this process becomes a potential self-assembly method to generate complex and reproducible patterns much smaller than the original templates (a simple example is shown in Figure 1). Quantitative understanding of such dewetting phenomena is critical in controlling the dewetting morphology for self-assembly. We have measured the rates of anisotropic edge retraction due to solid-state dewetting in kinetically stable crystallographic orientations. An understanding of the retraction of these orientations allows modeling for edges with other orientations that are composed of microfacets ^[1] . We have also developed a model for the effects of anisotropy on edge retraction using crystalline formulation.  This model is used as a prediction tool to reproduce the experimental result. Agreement between the model and experiments is generally good and provides a starting point for development of models that explain the evolution of edges with corners. These models will provide a predictive tool for relating pre-patterned structures to desired more complex dewetted structures.

1. W. C. Carter, A. R. Roosen, J. W. Cahn and J.F. Taylor, “Shape evolution by surface diffusion and surface attachment limited kinetics on completely faceted surfaces,” Acta Metallurgica Materialia, vol. 95, p. 12, 1995.

Recently, Li-O₂ batteries have attracted much attention as potential next-generation alternatives to lithium-ion batteries for electric vehicle energy storage ^[1] . This interest is due to the extremely high theoretical energy density (~3200 Wh/kg_Li2O2) available in the Li-O₂ system. During discharge in a Li-O₂ cell, Li⁺ reduces molecular O₂ to form Li₂O₂in the void volume of a porous cathode ^[2] . Our recent work ^[3] has demonstrated that arrays of aligned carbon nanofiber electrodes with extremely high void volume (>90%) can deliver gravimetric energy densities ~5 times higher than state-of-the-art Li-ion batteries at comparable rates, as evident in Figure 1. The reported energy density approaches the theoretical energy density for Li₂O₂. The aligned carbon nanofiber structures from our previous study ^[3] were fabricated directly on a porous alumina substrate using chemical vapor deposition ^{[4] [5]} . Aligned nanofiber/nanotube structures also provide an ideal platform for performing ex-situ studies of the morphological evolution of Li₂O₂, and the shapes of Li₂O₂ discharge products have been shown to resemble toroids ^{[2] [3]} at low rates, as Figure 2 shows. Recent work has focused on the fabrication of tall (~500 µm- thick) freestanding vertically aligned carbon nanotube (VACNT) carpets as binder-free electrodes for the Li-O₂ system. Additionally, we have performed extensive ex-situ SEM and TEM studies to investigate the morphological evolution of Li₂O₂ upon discharge and charge.

1. P. G. Bruce, S. A. Freunberger, L. J. Hardwick, and J. M. Tarascon, “Li-O(2) and Li-S batteries with high energy storage,” Nature Materials, vol. 11, pp. 19-29, Jan 2012.
2. Y.-C. Lu, D. G. Kwabi, K. P. C. Yao, J. R. Harding, J. Zhou, L. Zuin, and Y. Shao-Horn, “The discharge rate capability of rechargeable Li–O2 batteries,” Energy & Environmental Science, vol. 4, pp. 2999-3007, 2011.
3. R. R. Mitchell, B. M. Gallant, C. V. Thompson, and Y. Shao-Horn, “All-carbon-nanofiber electrodes for high-energy rechargeable Li–O2 batteries,” Energy & Environmental Science, vol. 4, p. 2952, 2011.
4. G. D. Nessim, “Properties, synthesis, and growth mechanisms of carbon nanotubes with special focus on thermal chemical vapor deposition,” Nanoscale, vol. 2, p. 1306, 2010.
5. G. D. Nessim, M. Seita, K. P. O’Brien, A. J. Hart, R. K. Bonaparte, R. R. Mitchell, and C. V. Thompson, “Low Temperature Synthesis of Vertically Aligned Carbon Nanotubes with Electrical Contact to Metallic Substrates Enabled by Thermal Decomposition of the Carbon Feedstock,” Nano Letters, vol. 9, pp. 3398-3405, 2009.

There is an increasing interest in AlGaN/GaN high electron mobility transistors (HEMTs) due to their great potential for high performance at microwave frequencies. However, the performance of these devices is often limited by material reliability issues. Unfortunately, a detailed physical understanding of the degradation mechanisms is still lacking. The objective of this project is to develop that understanding through appropriate testing and failure analysis, so that test methods and models can be developed that will lead to further improvement in the reliability and electrical performance of these devices though optimization their design.

Figure 1: Pits and particles observed at the gate edges of a stressed AlGaN HEMT (top view) ^[1] .

Recent work has focused on the formation of pits at the edge of the gate contact during electrical stressing and performance degradation ^{[1] [2] [3]} . These pits have been observed to form under a variety of stressing conditions and in a range of temperatures.  We have found that in some cases the pits are associated with formation of particles that appear to be an oxide of Ga (Figure 1), and that pit and particle formation is suppressed when samples are properly passivated or when they are stressed in ultra-high vacuum conditions. Also, stressing in the presence of water vapor was found to enhance the rate of degradation ^[1] .  This suggests that this failure mechanism is associated with electrochemically-enhanced oxidation.  We have also observed that the rate of pit formation is affected by temperature, both in isothermal experiments and in experiments in which the temperature within an individual device varies significantly.  This finding indicates that this failure process is thermally activated. We estimate an activation energy of about 0.3eV ^[2] .

Analytical techniques such as scanning electron microscopy (SEM), transmission electron microscopy (TEM), atomic force microscopy (AFM), cathode luminescence (CL), and energy-dispersive X-ray spectroscopy (EDX) will be employed in future studies of this and other degradation processes, with the goal of developing predictive models for failure rates and reliability.

1. P. Makaram, J. Joh, J. A. del Alamo, T. Palacios, and C. V. Thompson, “Evolution of structural defects associated with electrical degradation in AlGaN/GaN high electron mobility transistors,” Appl. Phys. Lett,  Vol. 96, p. 233509, 2010.
2. F. Gao, B. Lu, L. Li, S. Kaun, J. S. Speck, C. V. Thompson, and T. Palacios, “Role of oxygen in the OFF-state degradation of AlGaN/GaN high electron mobility transistors,” Appl. Phys. Lett., vol. 99, p. 223506, 2011.
3. L. Li, J. Joh, J. A. del. Alamo, and C. V. Thompson,“Spatial distribution of structural degradation under high-power stress in AlGaN/GaN HEMTs,” Appl. Phys. Lett., to be published.

Capacitors with high capacitance density (capacitance per footprint area) have potential applications in autonomous microsystems and for power management in high performance integrated circuits.  For self-powered autonomous systems, batteries are needed for storage of harvested energy with high energy densities. However, batteries are limited in their discharge power.  Coupled with capacitors, stored energy can be released at high powers, e.g., for broadcast of data.  Supercapacitors can also be used in on-chip switched capacitor converters for dynamic voltage scaling in low power integrated circuits ^[1] .

We are investigating the use of silicon nanowire arrays for fabrication of on-chip supercapacitors.  To fabricate nanowire arrays, we are using metal catalyzed etching (MCE) (Figure 1).  This is a room temperature wet etching process that has been used to create arrays of nanowires with radii and spacing in the range of tens of nanometers, with wire aspect ratios of over 200 to 1 ^[2] .

In earlier work, we demonstrated the feasibility of using the MCE to fabricate Si nanowires to make supercapacitors (Figure 2) ^[3] .  We have demonstrated a factor of approximately 10 times improvement in the capacitance density over planar devices for nanocapacitors with a 200-nm period and 1.5-μm height. Further improvement of silicon nanowire capacitors can be achieved by optimizing the geometries of the nanowire arrays and the dielectric material and structure, as well as the device layout. Our current work has focused on improving the capacitor performance by decreasing the equivalent series resistance. Lower resistance will provide a higher AC effective capacitance density and less heat generation.  Two approaches are under investigation to reduce the series resistance. One is through improved design of nanocapacitor arrays; the other is conversion silicon nanowires to silicide nanowires.

1. Y. K. Ramadass and A. P. Chandrakasan, “Voltage scalable switched capacitor DC-DC converter for ultra-low-power on-chip applications,” in IEEE Power Electronics Specialists Conference, 2007, pp. 2353-2359.
2. S. W. Chang, V. P. Chuang, S. T. Boles, C. A. Ross, and C. V. Thompson, “Densely-packed- arrays of ultrahigh-aspect-ratio silicon nanowire fabricated using block copolymer lithography and metal-assisted etching,” Advanced Functional Materials, vol. 19, p. 2495, 2009(5).
3. S. W. Chang, J. Oh, S. T. Boles, and C. V. Thompson, “Fabrication of silicon nanopillar-based nanocapacitor arrays,” Applied Physics Letters, vol. 96, p. 153108, 2010(4).

Controlling the intrinsic stress in polycrystalline thin films is of great importance in a wide variety of applications, especially those in which mechanical properties and reliability issues are critical, e.g., Nano-/microelectromechanical systems (N/MEMS). Using capacitance techniques, intrinsic stress can be monitored in situ and in real time during deposition processes. We do this in a UHV e-beam evaporator in which we grow FCC metal films at a range of homologous temperatures, in a range of deposition rates, and with variable vacuum conditions. These studies show an evolution to a high tensile stress during film formation (Type I behavior), or an evolution first to a tensile stress and then to a compressive stress at higher thicknesses (Type II behavior). The origin of this behavior, especially Type II behavior, is not well understood. In recent studies we have found that Pd and Ni deposited at intermediate homologous temperatures undergo a behavior intermediate to that of Type I and Type II (Figure 1), where the stress evolves from tensile to compressive and back to tensile. Transmission electron microscopy (TEM) reveals that the grain size increases during deposition at low or intermediate homologous temperatures. The grain size in Ni films deposited from 300K to 473K forms a linear relation with film thickness. Figure 2 shows representative bright field TEM images of Ni films deposited at 473K. It is known that grain growth in a constrained film leads to tensile stress. We believe that while the first tensile rise is associated with a coalescence stress, the second is associated with grain growth. Grain growth itself leads to a tensile stress and also to a lower rate at which ad-atom are trapped at boundaries to cause compressive stresses. We find that changes in the deposition conditions can modify this behavior.

Research Staff

• Dr. Wardhana Sasangka
• Dr. Swee Ching Tan

Collaborators

• Prof. Wee Kiong Choi (Nat’l. U. Singapore)
• Prof. Soo Jin Chua (NUS)
• Prof. Jesus del Alamo (MIT)
• Prof. Chee Lip Gan (Nanyang Tech. U.)
• Prof. D.L. Plata, Mt. Holyoke College
• Prof. A. John Hart (U. Michigan)
• Dr. Reiner Moenig (Karlsruhe Inst. Tech.)
• Dr. Gilbrt Nessim (Bar Ilan U.)
• Prof. Tomas Palacios (MIT)
• Prof. Yang Shao-Horn (MIT)
• Prof. Evelyn Wang (MIT)

Graduate Students

• Ahmed Al-Obeidi  (DMSE)
• Wubin Bai (DMSE)
• Tom Batcho (DMSE)
• Chee Ying Khoo (SMA)
• Gye Hyun Kim (DMSE)
• Changquan Lai (SMA)
• Prayudi Lianto (SMA)
• Hang Yu (DMSE)
• Hang Bo Zhao (DMSE)
• Wen Zheng (DMSE)

Support Staff

• Kathleen A. Fitzgerald, Administrative Assistant II

Publications

Ye, J. and Thompson, C.V., “Anisotropic edge retraction and hole growth during solid-state dewetting of single crystal nickel thin films,” Acta Materialia 59, 582 (2011).

Nessim, G.D., Seita, M., Plata, D.L., O’Brien, K.P., Hart, A.J., Meshot, E.R., Reddy, C.M., P.M. Gschwend,P.M., and Thompson, C.V. “Precursor gas chemistry determines the crystallinity of carbon nanotubes synthesized at low temperature,” Carbon 49, 804 (2011).

Oh, J., and Thompson, C.V., “A Tungsten Interlayer Process for Fabrication of Through-pore Anodic Aluminum Oxide Scaffolds on Gold Substrates,” J. Eelectrochem. Soc. 158, K11 (2011).

Oh, J., and Thompson, C.V., “Abnormal Anodic Aluminum Oxide Formation in Confined Structures for Lateral Pore Arrays,” J. Electrochem. Soc. 158, C71 (2011).

Ye, J. and C.V. Thompson, C.V., “Templated Solid-State Dewetting to Controllably Produce Complex Patterns,” Advanced Materials 23, 1567 (2011).

Oh, J., and Thompson, C.V., “The role of electric field in pore formation during aluminum anodization,” Electrochemica Acta 56, 4044 (2011).

Giermann, A.L., and Thompson, C.V., “Requirements for graphoepitaxial alignment through solid-state dewetting of Au films,” J. Appl. Phys. 109, 083520 (2011).

Choi, Z.-S., Lee, J., Lim, M.K., Gan C.L., and Thompson, C.V., “Void Dynamics in Copper-Based Interconnects,” J. Appl. Phys. 110, 033505 (2011).

Mitchell, R.R., Gallant, B.M., Thompson, C.V., and Shao-Horn, “All-carbon-nanofiber electrodes for high-energy rechargeable Li–O₂ batteries,” Energy Environ. Sci. 4, 2952 (2011).

Sasangka, W.A., Gan, C.L., Thompson, C.V., Choi, W.K. and Wei, J., “Influence of Bonding Parameters on the Interaction Between Cu and Noneutectic Sn-In Solder Thin Films,” J. Electronic Materials 40, 2329-3336 (2011).

Gao, F., Lu, B., Li, L., Kaun, S. Speck, J.S., Thompson, C.V., and Palacios, T.,  “Role of oxygen in the OFF-state degradation of AlGaN/GaN high electron mobility transistors,” Appl. Phys. Letts. 99, 223506 (2011).

Made, R.I., Gan, C.L., Yan, L., Kor, K.H.B., Chia, H.L., Pey. And Thompson, C.V. “Experimental characterization and modeling of the mechanical properties of Cu–Cu thermocompression bonds for three-dimensional integrated circuits,” Acta Materialia 60, 578 (2012).

Li, L., Joh, J., del Alamo, J.A., and Thompson, C.V.,”Spatial distribution of structural degradation under high-power stress in AlGaN/GaN HEMTs,” Appl. Phys. Letts. 100, 172109 (2012).

Thanks to their excellent electrical performance, AlGaN/GaN high electron mobility transistors (HEMTs) are considered ideal devices for the next generation of high-power and high-frequency electronics ^[1] . However, the limited understanding of their long-term reliability and degradation mechanisms is slowing down the insertion of these devices in actual systems ^[2] .

Recently, we have reported the formation of oxide particles next to the gate edge of GaN HEMTs after OFF-state step-stress degradation experiments ^[3] . Underneath these particles, pits similar to the ones reported in previous papers ^[4] are observed. In this work, we investigate the role of oxygen in the formation of these particles/pits during OFF-state stress and use oxygen diffusion barriers to improve the reliability of AlGaN/GaN HEMTs.

Two different dielectrics have been used: Al₂O₃ deposited by atomic layer deposition and in-situ SiN_x deposited immediately after the growth of the AlGaN/GaN epitaxial layer by metal organic chemical vapor deposition (MOCVD). Step-stress degradation experiments were performed in both samples in air and vacuum. No degradation was found in either sample during the experiments in vacuum, which shows that the oxygen necessary for the particle formation probably comes from air. In contrast, when the samples were stressed in air, a large degradation and particle/pit formation were found in the Al₂O₃-passivated sample, while no structural or electrical degradation was found in the sample with in-situ SiN_x (see Figures 1 and 2). The in-situ SiN_x dielectric is believed to be a much better diffusion barrier for oxygen gas and water vapor than Al₂O₃, which significantly reduces device degradation.

In summary, the in-situ deposition of a SiN_x gate dielectric and passivation layer successfully eliminated the diffusion of oxygen from air and water vapor to the AlGaN surface, which improved the OFF-state reliability of AlGaN/GaN HEMTs.

1. U. K. Mishra, L. Shen, T. E. Kazior, and Y-F Wu, Proceedings of the IEEE, 2008, vol. 96, p. 287.
2. G. Meneghesso, G. Verzellesi, F. Danesin, F. Rampazzo, F. Zanon, A. Tazzoli, M. Meneghini, and E. Zanoni, IEEE Trans. Device Mater. Reliab. vol. 8, p. 332, 2008.
3. F. Gao, B. Lu, L. Li, S. Kaun, J. S. Speck, C. V. Thompson, and T. Palacios, Appl. Phys. Lett. vol. 99, p. 223506, 2011.
4. J. Joh and J. A. del Alamo, IEEE Electron Device Lett. vol. 29, p. 287, 2008.