Jesús A. del Alamo

MTL

 

Project title: RF power performance GaAs of 90 nm and 65 nm CMOS

Staff: Jorg Scholvin (PhD candidate, IBM Fellow)

Sponsor: IBM Faculty Award, IBM Fellowship

Description:

The microelectronics industry continues to develop new CMOS logic technology at a brisk pace. In order to satisfy society's seemingly insatiable demand for new computers, video games, and other logic products, Moore's law dictates that a new generation of technology be introduced every two years or so. The current volume production technology is 90 nm. The next generation technology, currently ramping up production, is 65 nm.

Shortly after the introduction of a new logic technology, new processing modules are added to it in order to support a wider range of applications, such as those enabling communications functions. Examples are bluetooth and wireless LAN transceivers and many consumer applications. One of the most demanding functions is RF power amplification, that is, the implementation of high-frequency power amplifiers for communications using logic CMOS technology. At MIT, we are investigating the potential and challenges of implementing RF power amplifiers using 90 and 65 nm CMOS logic technology. Our research is mapping the potential of these leading technologies for RF power in the multidimensional space of power, frequency and efficiency. Bottlenecks to achieving high efficiency at high frequencies are being identified and solutions to these bottlenecks are being proposed.

Publications:

Scholvin, J., J. G. Fiorenza, and J. A. del Alamo, "The Impact of Substrate Surface Potential on the Performance of RF Power LDMOSFETs on High-Resistivity SOI". Submitted to IEEE Transactions on Electron Devices.

Scholvin, J., D. R. Greenberg, and J. A. del Alamo, "Performance and Limitations of 65 nm CMOS for Integrated RF Power Applications." 2005 IEEE International Electron Devices Meeting, Washington, DC, December 5-7, 2005, pp. 381-384.

Scholvin, J., D. R. Greenberg and J. A. del Alamo, "RF Power Potential of 90 nm CMOS: Device Options, Performance, and Reliability." 2004 IEEE International Electron Devices Meeting, San Francisco, CA, December 13-15, 2004, pp. 455-458.

Scholvin, J., J. G. Fiorenza, and J. A. del Alamo, "The Impact of Substrate Inversion on the Performance of RF Power LDMOSFETs on High-Resistivity SOI." 2003 IEEE International Electron Devices Meeting, Washington, DC, December 8-10, 2003, pp. 363-366.

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