Duane S. Boning
Duane Boning is Professor and Associate Head of the Department of Electrical Engineering
and Computer Science at MIT. He is affiliated with the MIT Microsystems Technology Laboratories.
Research Interests
Research interests include the modeling and control of variation in
semiconductor and MEMS manufacturing. Particular emphasis is on modeling of
chemical mechanical polishing (CMP) and advanced interconnect
processes, and control in CMP and plasma etch.
Teaching
Research Projects
Additional Service
Associated Students (Advisor/Co-Advisor)
- Degrees granted in Academic Year 2006-2007: 4 PhD, 1 SM/MEng, 4 LFM
- Degrees granted in Academic Year 2005-2006: 2 SM/MEng, 1 LFM
- Degrees granted in Academic Year 2004-2005: 1 SM/MEng, 1 LFM
- Degrees granted in Academic Year 2003-2004: 2 SM/MEng, 1 LFM
- Degrees granted in Academic Year 2002-2003: 1 SM/MEng, 1 LFM
- Degrees granted in Academic Year 2001-2002: 6 PhD, 4 SM/MEng, 7 LFM
Address
Prof. Duane Boning
MIT, Room 38-435
77 Massachusetts Ave
Cambridge, MA 02139
Phone: 617 253-0931
Email: boning at mtl.mit.edu
Assistant:
Sharlene Blake,
sblake at mtl.mit.edu, 617 253-4657
Map showing building location.
For online versions of papers, see the listings associated with
particular research activities (e.g. CMP/Metrology).
Biography
Duane S. Boning received the S.B. degrees in electrical engineering
and in computer science in 1984, and the S.M. and Ph.D. degrees in
electrical engineering in 1986 and 1991, respectively, all from the
Massachusetts Institute of Technology. He was an NSF Fellow from 1984
to 1989, and an Intel Graduate Fellow in 1990. From 1991 to 1993 he
was a Member Technical Staff at the Texas Instruments Semiconductor
Process and Design Center in Dallas, Texas, where he worked on
semiconductor process representation, process/device simulation tool
integration, and statistical modeling and optimization.
Dr. Boning is a Fellow of the IEEE, is Editor in Chief for the IEEE
Transactions on Semiconductor Manufacturing, and has served as
chairman of the CFI/Technology CAD Framework Semiconductor Process
Representation Working Group. He is a member of the IEEE,
Electrochemical Society, Eta Kappa Nu, Tau Beta Pi, Materials Research
Society, Sigma Xi, and the Association of Computing Machinery.
Last updated September 27, 2007
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