DAWSON RESEARCH GROUP


       Joel L. Dawson, principal investigator

  
 
 

 
projects
 
 

"Ultra-low Power, Energy-efficient Platform for Biomedical Implants"

"Small, ultra-low power, digitally-assisted sensor interface for medical implants"

"Asymmetric multilevel outphasing (AMO) architecture for multi-standard transmitters"

An Ultra-low Power CMOS RF Transceiver for Medical Implants

RF PA Linearization: Open-Loop Digital Predistortion Using Cartesian Feedback for Adaptation

Nested Chopper Stabilization in Analog Multipliers and Down-conversion Mixers

System Design Using Convex Optimization from Circuit Level to System Level

Chopper Stabilization in Analog Multipliers

A DC Stabilized Fully Differential Amplifier

Design of a High Efficiency RF Power Amplifier for an MCM Process

 

"Ultra-low Power, Energy-efficient Platform for Biomedical Implants"

Tania Khanna, Willie Sanchez, Jack Dong

In recent years, trends in the medical industry have created a growing demand for implantable medical devices. In particular, the need to provide doctors a means to continuously monitor biomarkers over long time scales with increased precision is paramount to efficient healthcare. To make medical implants more attractive, there is a need to reduce their size and power consumption. Small medical implants would allow for less invasive procedures and greater comfort for patients. Reductions in power consumption translate to longer battery life. The two primary limitations to the size of small medical implants are the batteries that provide energy to circuit and sensor components and the antennae that enable wireless communication to terminals outside of the body.

This research looks to explore and combine unconventional approaches to ultra-low power and adiabatic techniques, ultracapacitor-based energy sources, RFID links, and fractal geometry antennas to achieve the goals of micro-miniaturization and ultra-low power operation.

 

"Small, ultra-low power, digitally-assisted sensor interface for medical implants"

Jose Bohorquez

There is growing interest in the development of ultra-low power systems for medical implants. For applications with multi-electrode arrays, including those for brain-machine interfaces, the power consumption and size of each sensor interface is critical. This work is geared towards developing ultra-low power sensor interfaces that leverage novel analog, mixed-signal, and digital techniques to relax the specifications of each block and yield optimized system size and power consumption. This includes the use of unconventional mixed-signal filters and feedback systems to reject interference and limit the impact of DC offset and 1/f noise.

 

"Asymmetric multilevel outphasing (AMO)
architecture for multi-standard transmitters"

Sungwon Chung, Philip Godoy, Taylor Barton
RF power amplifiers (PA) in modern communication devices such as for WLAN, 3G WCDMA, and 4G LTE systems, have poor power efficiency while consuming a bulk amount of power. This research project aims to improve the traditional trade-off between power efficiency and linearity by a digitally assisted RF architecture. In order to increase power efficiency of RF power amplifiers (PAs) over a wider output power range and significantly simplify RF/analog front-end for the PAs, we present a new outphasing transmitter based on asymmetric multilevel outphasing (AMO) modulation.

Compared to classical outphasing transmitters and multilevel LINC transmitters, AMO achieves the highest power efficiency by obtaining the smallest outphasing angle with the independent switching of the supply voltage for each PA. A new direct RF phase converter (DRFPC) for wideband phase modulation and adaptive linearization subsystem are under development for a compact and low-power RF/analog front-end to AMO PAs. Discrete supply voltage levels and low oversampling allow wideband transmission.

 

 
completed projects
 

An Ultra-low Power CMOS RF Transceiver for Medical Implants

Jose Bohorquez

Until recently, few medical implants had the capability of wireless data transmission. Most devices capable of data transmission did so through inductive coupling which requires physical contact with the "base-station" and only allows for low data rates. In 1999, the FCC commissioned the "Medical Implant Communications Service" specifications for medical telemetry which allows for RF communications between a medical implant and a base-station that is up to two meters away. This research sought to explore unconventional approaches to radio communications specifically geared towards low power, short distance data transmission in a temperature regulated environment (i.e., the human body). A 350uW MSK transmitter and a 400uW OOK superregenerative receiver were developed that met the MICS requirements. Novel techniques for superregenerative detection were introduced, and a frequency-domain analysis technique was developed to advance understanding and analysis of superregenerative amplifiers. Further, a novel frequency correction loop strategy was introduced and verified.

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RF PA Linearization: Open-Loop Digital Predistortion Using Cartesian Feedback for Adaptation

Sungwon Chung, Jack Holloway, Jeffrey Huang

RF power amplifiers are commonly linearized using a symbol predistortion scheme in the digital domain. This approach benefits from high symbol rates inherent from it's open-loop nature, however the technique relies on a detailed PA model -- one that is often difficult to formulate and cumbersome in implementation.

Cartesian feedback, by comparison, operates in continous time with little knowledge of the PA's dynamics or time-dependent behavior. This technology makes use of analog feedback, and thus sacrifices symbol rate for loop stability.

This work focuses on implementing a digital predistortion technique for RF PA linearization in which no PA model is needed a priori. Instead, cartesian feedback is used to train a digital predistorter over an application's symbol constellation. During transmitter usage, the digital predistorter is operated in an open-loop configuration. In this way, the system offers high symbol bandwidths while not relying on complicated PA models.

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System Design Using Convex Optimization from Circuit Level to System Level

Tania Khanna

Within a system, input and output specifications for individual circuit blocks are commonly assigned with little knowledge of optimality. These specifications allow for almost optimal design of individual circuit blocks, but it remains questionable whether the pre-defined specifications are optimal over the entire system. Equation-based and simulation-based optimization techniques have already been used to optimize circuit blocks. By creating signomial models for transistors and formulating a program describing the circuit specifications, we result in an optimal circuit design. We extend the equation-based technique to the system level by treating the problem hierarchically. Specification trade-off curves from the circuit block topologies are quantified and passed up to the system level in order to optimize each circuit block's input and output specifications simultaneously. This technique will provide system designers with a better system starting point as opposed to several starting points — one for each circuit block within the system. Furthermore, the generated trade-off curves are well behaved and modeled easily with simple monomial functions allowing for fast optimization at the system level, making a case for equation-based design over simulation-based design. I am applying this new technique to the design of 10-bit pipeline analog-to-digital converter in a 0.18u process with sampling speed of 100 MHz.

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"Nested Chopper Stabilization in Analog Multipliers and Mixers"
Philip Godoy (S.M.)

Philip completed his S.M. Degree in June 2008. His project involved the application of chopper stabilization to analog multipliers to remove offset, 1/f noise, and even-order distortion. The technique is shown to be effective for both DC and AC multiplication and is insensitive to drift. Both square-wave and pseudorandom chopping are shown to reduce the offset to the microvolt level. In addition, the nested chopping technique is applied to an analog multiplier which employs two levels of chopping to reduce the off set even further. An illustrative CMOS prototype of a chopper-stabilized general-purpose multiplier in a 0.18um process is presented which achieves a worst-case o ffset of 1.5uV. This is the lowest measured off set reported in the DC analog multiplier literature by a margin of two orders of magnitude. The prototype multiplier is also tested with AC inputs as a squarer, variable-gain ampli fer, and direct-conversion mixer.

 

Chopper Stabilization in Analog Multipliers

Ali Hadiashar (S.M.)

Ali completed his S.M. Degree in  early 2006. His project involved offset reduction in analog multipliers. Chopper Stabilization is a well known technique for removing DC offset from amplifiers. A new application is presented of chopper stabilization to analog multipliers for improved DC performance. He plans to produce an in-depth analysis of the performance and limitations of this new technique applied to DC analog multiplication.

Click here to see Ali's poster on Chopper Stabilization in Analog Multipliers.

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A DC Stabilized Fully Differential Amplifier

Nancy Sun (MEng, Draper Laboratories VI-A)

The conventional method of constructing a gain amplifier is to use resistor feedback networks. However, recent tests on one of Draper Laboratory's gyroscopes has shown that amplifiers using on-chip polysilicon resistors do not exhibit adequate gain stability over temperature due to poor resistor tracking. Fortunately, present CMOS technology provides capacitors that have substantially better tracking and better absolute temperature and voltage coefficients. Therefore, a gain amplifier using capacitive feedback is proposed to replace the existing amplifier using resistive feedback. A DC stabilization network will also be designed to prevent output saturation.

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Design of a high efficiency RF power amplifier for an MCM process
Jimmy Noonan (MEng, Draper Laboratories VI-A):

For my M.Eng thesis, I am designing a high efficiency RF power amplifier for eventual fabrication using Draper Laboratory's Multi-chip Module (MCM) process. MCM technology allows bare die to be combined and interconnected on a single substrate, reducing circuit size and parasitic effects. The design will use a single power supply enhancement mode pHEMT (pseudomorphic high electron mobility transistor). To achieve high efficiency, a switching mode topology (Class E or Class F) will be used in the design.

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