- T.S. Park, C.S. Tan, A. Fan, J.H. Lee, E.J. Yoon, and R. Reif, “Fabrication
of Nano-scale Triple-gate MOSFET Using Two I-line Photolithography Steps,” submitted
to 12th Korea Semiconductor Research Conference.
- N. Checka, D. Wentzloff,
A. Chandrakasan, and R. Reif, “The Effect
of Substrate Noise on VCO Performance,” accepted to Radio Frequency
Integrated Circuits Symposium, June 2005.
- N. Checka, A. Chandrakasan, and R. Reif, “Substrate Noise Analysis
and Experimental Verification for the Efficient Noise Prediction of a
Digital PLL,” accepted to IEEE Custom Integrated Circuits Conference,
No. 205, September 2005.
- K.N. Chen, A. Fan, C.S. Tan, and R. Reif, “Copper Wafer Bonding:
Interface Analysis and Characterization,” submitted to 2005 Microscopy
- C.S. Tan, A. Fan, K.N. Chen, and R. Reif, “A Back-to-Face Silicon
Layer Stacking for Three-Dimensional Integration,” accepted to
2005 IEEE International SOI Conference, Honolulu, HI, October 2005.
- R. Gutmann, J. Lu, J.
Yu, K. N. Chen and R. Reif, "Copper Metallization Needs for Wafer-Level,
Three-Dimensional Integration", 207th ECS meeting, Quebec City, Canada,
- K.N. Chen, A. Fan, C.S. Tan and R. Reif, “Effects of surface roughness
and oxide formation of Cu film on the quality of Cu wafer bonding”,
2005 TMS meeting, San Francisco, February 2005.
- K.N. Chen, A. Fan, C.S. Tan and
R. Reif, “Bonding parameters of Cu wafer bonding for 3D Integration”,
2005 TMS meeting, San Francisco, February 2005.
- K.N. Chen, S.M. Chang, L.C. Shen
and R. Reif, “Using different test techniques to investigate the bond
strength of Cu wafer bonding”, 2005 TMS meeting, San Francisco,
- Rafael Reif, Chuan Seng
Tan, Andy Fan, Kuan-Neng Che, Shamik, and Nisha Checka, “ Technology
and Applications of Three-Dimensional Integration”, Proceedings
of 2004 ECS meeting, Honolulu Hi, October 2004.
- S. Das, A. Fan, K.-N.
Chen, C. S. Tan, N. Checka, and R. Reif. "Technology, Performance, and
Computer-Aided Design of Three-Dimensional Integrated Circuits." Proc.
ISPD, Apr. 2004
- K. N. Chen, A. Fan, C.
S. Tan and R. Reif, “Abnormal Contact Resistance Reduction in Bonded
Cu Interconnects Using Pre-Bonding HCl Cleaning", MRS Fall
Meeting, Boston, December 2003.
- K.N. Chen, A.
Fan, C.S. Tan and R. Reif, “Relation
of Contact Resistance Reduction and Process Parameters of Bonded Copper
Interconnects in Three-Dimensional
Integration Technology”, Proceedings of 2003 ECS meeting, Orlando
FL, October 2003.
Chen, Andy Fan, Chuan Seng Tan, and Rafael Reif, “Temperature and Duration
Effect on Microstructure Evolution During Copper Wafer Bonding”,
2003 TMS meeting, San Diego CA, March 2003.
Das, A. Chandrakasan, and R. Reif. "Three-Dimensional
Integration: Performance, Design Methodology, and CAD Tools," Proc. ISVLSI, 2003.
Das, A. Chandrakasan, and R. Reif. "Design
Tools for 3-D Integrated Circuits," Proc. ASP-DAC, pp. 53-56, Jan. 2003.
- R.Reif, C.S.Tan,
A.Fan, K.N.Chen, S.Das, and N.Checka, “3-D
Interconnects Using Cu Wafer Bonding : Technology and Applications,” Advanced Metallization
Conference, San Diego, October 1-3, 2002.
Fan, S. Das, K.N. Chen, and R. Reif, ”Fabrication Technologies for
Three-Dimensional Integrated Circuits,” IEEE International Symposium
on Quality Electronic Design, pp. 33-37, 2002.
Rahman, A. Fan and R. Reif, "Thermal Analysis of Three-Dimensional (3-D)
Integrated Circuits (ICs)," Proceedings IITC, pp. 157-159, June
Rahman, S. Das, A. Chandrakasan, and R. Reif, "Wiring
Requirement and Three-Dimensional Integration of Field-Programmable Gate
ACM/IEEE Intl. Workshop. on SLIP, 107-113, April 2001.
Fan, K.N. Chen, and R. Reif, “Three-Dimensional Integration with Copper
Wafer Bonding”, Electrochemical Society Spring Meeting, ULSI Process
Integration Symposium, pp. 124-132, Proceedings Volume 2001-2, Washington,
D.C., March 25-29, 2001. Also, Proceedings of the 199th Meeting
of The Electrochemical Society, Volume 2001-1, Abstract 404,Washington,
D.C., March 25-29, 2001.
Reif, Andy Fan, and Arifur Rahman, Material Challenges and Opportunities
of Monolithic Three-Dimensional Integration in Microelectronics (keynote
talk), Minerals, Metals and Material Society (TMS) Fall Meeting 2000,
St. Louis, Missouri.
Rahman, A. Fan and R. Reif, "Comparison of Key Performance Metrics in
Two- and Three-Dimensional Integrated Circuits," Proceedings IITC,
pp.18-20, June 2000.
Rahman, A. Fan, J. Chung and R. Reif, "Wire length distribution of Three-Dimensional
Integrated Circuits," Proceedings IITC, pp.233-235, June 1999.
Rahman, Dimitri Antoniadis, and Anant Agarwal, Study of 3-D Integration
of High Performance Logic, SRC/SEMATECH/MARCO Workshop on Interconnects
for Systems on a Chip, May 22, 1999, Stanford University, CA.
- Arifur Rahman, Andy Fan, and Rafael
Reif, Wire-Length Distribution of Three-Dimensional Integrated Circuit,
1999 Workshop on System-Level Interconnect Prediction (SLIP), April 10-11,