The revolution of the Internet of Things promises an exponential growth of connected devices. To sustain this market demand, the semiconductor industry requires a real breakthrough in energy efficiency both for the connected devices and for the communication infrastructure. Innovative solutions for very energy efficient systems are mandatory to continue the growth the semiconductor industry enjoyed, covering ultra-low power systems, energy management and harvesting. This talk will present the 28nm UTBB FD-SOI CMOS (Ultra-Thin Body and Buried-oxide Fully Depleted Silicon On Insulator) technology and its main features for analog, RF and mmW design. Two design examples (Gm-C analog filter and mmW Power Amplifier) will highlight the major advantages impacting system level features, and focus will be given on extensive usage of wide voltage range body biasing techniques.
Andreia Cathelin has been since 1998 with STMicroelectronics Crolles, France, now in Technology R&D, Technology and Design Platform. She is Senior Member of the Technical Staff, supporting internal and external customers on advanced technologies developments such as 28nm FDSOI CMOS or BiCMOS 55nm. Her major fields of interest are in the area of RF/mmW/THz systems for communications and imaging, where she is leading advanced design R&D projects. She manages as well the University Collaboration Program for Design topics, and she is in charge of the ST-CMP interface.Andreia is serving in several IEEE conferences and committees: on the Executive Committee of ISSCC, is the Steering Committee Chair of ESSCIRC-ESSDERC, officer at VLSI Symposium on Circuits; she is as well elected SSCS AdCom member. She received EE degree in 1994 from ISEN Lille, then a PhD in 1998, as well as a “habilitation à diriger des recherches” (French highest academic degree) in 2013, both from University of Lille, France.