Transistor Evolution Towards 5nm Node: Band Structure Engineering and PPA Analysis
MTL Seminar Series
Victor Moroz, Synopsys
Speaker
Abstract
Transistor design is becoming exciting again. FinFETs will take us to 7nm technology node. Beyond that, we tailor semiconductor bandstructure to optimize transistor behavior. Design-Technology Co-Optimization suggests that perfecting a single transistor is not enough to get a good Power-Performance-Area trade-off. We employ standard library cells as a vehicle for benchmarking transistor and interconnect architectures.