[labnetwork] Methods for preventing ESD during dicing process

[Levent Erdal Aygun]

Hi,

We are having ESD issues when we dice our glass substrates with thin-film transistor circuits on them. I would be happy if you can share the methods/tricks that you use to prevent ESD during dicing in your labs.

Our setup:
Dicer: ADT 7100 (doesn't have CO2 injector to control DI water's impedance)
Tape: Ultron 1020R (UV sensitive)
Sample: Glass 3"x3", 1.1 mm thick, die size: 5 mm x 5 mm with TFTs on it.

To minimize ESD we spin coat photoresist and a conductive layer (Pedot:PSS) on our sample. It works for protecting isolated TFTs but when we have a larger circuit with 100s of TFTs connected via long (~5 mm) interconnects our yield decreased significantly.

Bonus questions:
- Do you have any suggestions for a conductive material that we can spin coat (short everything) before dicing and remove using acetone/water (don't want to use any acid) after dicing ?
- We are thinking about using a precision glass cutter instead of a dicer hoping that we won't have a rotating blade, causing ESD.  Any good/bad experience with precision glass cutters ?
- Another idea is using tap water instead of DI water during dicing. We may just swap to tap water when we are dicing ESD prone samples and go back to DI water for all other samples. Is there any lab doing a similar trick ? (We got a quote for a CO2 injector ($17k), I don't think we can get that really soon).

Best regards,
Levent
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Levent Erdal AYGUN
PhD Student
Dep. of Electrical Engineering
Princeton University
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