[labnetwork] Metallization on rough ceramic substrates

[Kamal Yadav]

Dear Aditi,

Are you observing undercut in your resist profile before you put metal.
Without sufficient undercut [~ 1um] lift off would be challenging
regardless of other issues.

The total resist stack should be > 3X the metal you intend to deposit. If
you are using LOR, the LOR thx should be > 1.4 times the metal thickness.
Bilayer lithography [LOR + Imaging], is little better option for lift off,
[however you can still do with single layer provided you have undercut].
The imaging resist to LOR thickness ratio is usually 3:1 or 4:1. I observed
it to be a little more challenging in process with ratio of 1:1 or 1:2 as
advertised in the LOR datasheets.

Thanks,
Kamal






On Fri, Jan 4, 2019 at 7:52 PM Mark K Mondol <mondol at mit.edu> wrote:

> I agree with Noah Clay, he identifies the issues correctly, in my view.
>
> I would add that a general rule of thumb for liftoff is to spin resist
> about 3X thicker than the metal layer you want to liftoff.
>
> Regards,
>
> Mark K Mondol
> On 1/4/2019 2:16 PM, Noah Clay wrote:
>
> Hello Adithi,
>
> As you know, ceramics can be quite porous and metal adhesion can be
> diminished by surface/internally adsorbed water, organics, etc. Therefore,
> you may consider deep solvent cleaning, other surface treatments as
> appropriate (e.g., plasma) for your material and a lengthy dehydration bake
> prior to resist application.  If pre-resist cleaning proves ineffective,
> then after resist development, you may consider O2 plasma or, if available,
> in-situ ion bombardment.  Lastly, given the rough topography of your
> substrate, there may be undeveloped or underexposed pockets of resist on
> the substrate, which necessitate optimizing bake, exposure and develop
> conditions.
>
> As for HMDS (mainly used for Si), without knowing the type of ceramic
> you’re using, I can’t say that it will be effective as an adhesion
> promoter.  I very humbly/respectfully disagree with previous comments that
> HMDS is used mostly for etching, but agree that to facilitate liftoff, a
> relatively thick LOR layer should be spun and baked before application of
> imaging resist.
>
> Best,
> Noah Clay
>
> *Singh Center for Nanotechnology *
> *University of Pennsylvania *
> *Philadelphia, PA*
>
> Sent from my iPhone
>
> On Jan 4, 2019, at 08:51, Hitesh Kamble <hit.kamble at gmail.com> wrote:
>
> Hello Adithi,
>  In case of HMDS ,it will improve adhesion but resists will not remove
> easily from surafce.HMDS is mostly use in etching. Since you're having
> rough surface, Instead of HMDS use LOR 3B or say liftOFF resists which
> helps to improve liftoff process.
> Also for 250nm metallization you need more than 2um thick resists.
>
> We did not do this on ceramic samples exactly but successfully did liftoff
> on etched/textured glass and etched samples(roughness more than~400nm).
> Following are my suggestions:
> -Time  Interval between litho and deposition should be lowest as possible
> - Dehydration at higher temp and for longer time.
> -LOR 3B coating at lower rpm and gradually increase rpm.
> -Keep sample in Remover PG and heat at 80C for 5min or more if metal not
> lifted,(Sonication not recquired in most cases)
>
>
> Thanks,
> Hitesh Kamble
> IITBNF-IIT Bombay
>
>
>
> On Fri 4 Jan, 2019, 6:08 PM ADITHI U <uadithi at iisc.ac.in wrote:
>
>> Dear All,
>>
>>
>>       We are having difficulties in doing metal(Ti/Pt) lift off on
>> ceramic substrates. Does any of you have experience on fabricating metal
>> patterns on the rough Ceramic Substrates. Below are the details of the
>> process done.
>>
>>
>>    The roughness of the ceramic substrates were approximately 400nm. We
>> had used HMDS as adhesion promoter for lithography, the thickness of the
>> Photoresist was ~ 1.5um.The thickness of the Ti/Pt layer was ~ 250nm.
>> Immediately after lithography the deposition was done  followed by 48 hours
>> of lift off(Acetone) process. Ultrasonication(5-10mins) in Acetone was done
>> after 48hours.
>>
>> *Best Regards
>> *
>> *
>>
>> Adithi.U
>> Senior Facility Technologist,
>> National Nano Fabrication Centre,
>> CeNSE, Indian Institute of Science
>> Bangalore*
>>
>>
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> --
> Mark K Mondol
> Assistant Director NanoStructures Laboratory
> And
> Facility Manager
> Scanning Electron Beam Lithography Facility
> Bldg 36  Room 229www.rle.mit.edu/seblmondol at mit.edu
> office - 617-253-9617
> cell - 617-224-8756
>
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-- 
Thanks,
Kamal
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