[labnetwork] Challenging Oxide Etch Process

Demis D. John demis at ucsb.edu
Wed Feb 17 19:47:38 EST 2021


We would generally permit this, although discourage it for volume or more
frequent use.  But one time would be acceptable.  We would recommend using
a system equipped with a laser etch monitor
<https://wiki.nanotech.ucsb.edu/wiki/Laser_Etch_Monitoring> to minimize
overetch into the Au.
We could run this etch if you need it, using our Fluorine ICP
<https://wiki.nanotech.ucsb.edu/wiki/Fluorine_ICP_Etcher_(PlasmaTherm/SLR_Fluorine_ICP)>.
Since the Au will only be exposed for a short time, risk of sputtering in
the tool is low.  However, the Au will likely get sputtered onto the etched
SiO2 sidewalls - which should be acceptable if the next step is further
metallization through the via.

Contact me privately if you want to discuss further.

On Wed, Feb 17, 2021 at 12:49 PM Reger, Ronald K <rreger at purdue.edu> wrote:

> Dear Colleagues,
>
>
>
> One of our faculty members has a process he needs to run in which
> nano-scale oxide definition is required to expose a gold contact pad.  With
> our shared-use RIEs we are very concerned about Au contamination in our
> etch tools, particularly for our electron device researchers.  We’re
> seeking your input from your facilities whether you may have etch tools
> that allow Au processing for these specialty kinds of processes, and if you
> have a procedure for dealing with such contamination.  A generic sketch
> about what our faculty member needs is shown below.
>
>
>
> So, have you dealt with this contamination issue with your multi-use tools
> before, and how do you deal with mitigating the contamination?  Do any of
> you have a tool that could be used by this research group?
>
>
>
> Thanks very much in advance.
>
>
>
> Ron Reger
>
> Birck Nanotechnology Center
>
> Purdue University
>
>
>
>
>
> *Generic process steps*:
>
>
>
> Fabrication need: metal connection to a sub-micron-size metal pad buried
> under <=50nm ALD oxide (HfO2 or Al2O3).
>
> Conventional fabrication steps (see sketch attached):
>  (1) cover metal pad with etch-resistive metal, e.g. Au,
>  (2) ALD-grow oxide (20-50nm),
>  (3) define a sum-micron PMMA mask using e-beam lithography,
>  (4) dry etch oxide with Au serving as a stop-etch layer (ICP-assisted
> etch using BCl3 or SF6 gases),
>  (5-6) subsequent standard e-beam lithography to connect the exposed Au
> pad to the outside circuit.
>
> Problem: Au (or any other metal which forms non-volatile compounds in RIE
> system) may be problematic for some electron device processes and is
> restricted from being used in shared-use RIE oxide etchers.
>
> Current work-around: for large (>10 micron) pads steps (3-4) can be
> performed by optical lithography + wet etch in HF. e-beam resists like PMMA
> are attacked by HF and this work-around cannot be used if sub-micron
> lithography is needed.
>
>
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