[labnetwork] Need help with RIE process

Vito Logiudice vito.logiudice at uwaterloo.ca
Wed Mar 4 10:51:41 EST 2015


Hi Rick,

I think you've nailed the source of the problem. I've seen damage like this on a CMOS production line where further analysis confirmed the cause to be electrostatic discharges. SEM analysis showed spectacular, deep craters surrounded by obvious debris much like in the photo you sent.

This might not be feasible and I'm not entirely sure it would help reduce/eliminate the problem but can you perhaps get away with fastening the wafer to another, bare carrier wafer via the use of an acceptable adhesive (the same resist being used as your etch mask perhaps)?

Good luck
Vito
--
Vito Logiudice  P.Eng.
Director of Operations, Quantum NanoFab
University of Waterloo
Lazaridis QNC 1207
200 University Avenue West
Waterloo, ON           Canada N2L 3G1
Tel.: (519) 888-4567  ext. 38703
Email: vito.logiudice at uwaterloo.ca<mailto:vito.logiudice at uwaterloo.ca>
Website: https://fab.qnc.uwaterloo.ca


From: <Morrison>, "<Richard H.>", "Jr." <rmorrison at draper.com<mailto:rmorrison at draper.com>>
Date: Wednesday, 4 March, 2015 7:08 AM
To: "labnetwork at mtl.mit.edu<mailto:labnetwork at mtl.mit.edu>" <labnetwork at mtl.mit.edu<mailto:labnetwork at mtl.mit.edu>>
Subject: [labnetwork] Need help with RIE process

Hi everyone,

I have a strange problem that I need some help with. We have an  Ulvac NE-550 RIE system with an electrostatic chuck. The wafer is a double sided polish with 1um of SiO2. One side has an AZ4620 resist pattern 8um thick to etch the 1um of oxide. Because the process runs hot we break the etch into 9 different steps and move into the LL after every step. On the polished side that is down on the ESC check we have craters on the surface that look like a lightning strike or meteor strike, this is fairly deep several microns.

I have attached a photo of the damage. Have any of you seen anything like this? I need to fix the issue because the side that is down ends up being the frontside of the wafer and that is a killer defect. We think the oxide is charging and when the lift pins come up (at ground potential) we get a discharge.

Rick


Draper Laboratory
Principal  Member of the Technical Staff
Group Leader Microfabrication Operations
555 Technology Square
Cambridge Ma, 02139-3563

www.draper.com
rmorrison at draper.com<mailto:rmorrison at draper.com>
W 617-258-3420
C 508-930-3461

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